, add a gtest to ensure
all formats are handled.
v3. Ensure that GL_NO_ERROR is set before returning.
Cc: Brian Paul bri...@vmware.com
Cc: Chad Versace chad.vers...@intel.com
Signed-off-by: Nanley Chery nanley.g.ch...@intel.com
---
src/mesa/drivers/dri/i915/intel_pixel_read.c | 2
14, 2015 at 4:00 PM, Chad Versace chad.vers...@intel.com
wrote:
On Tue 11 Aug 2015, Nanley Chery wrote:
From: Nanley Chery nanley.g.ch...@intel.com
Only uncompressed formats have a non-void type and actual components
per pixel.
Rename _mesa_format_to_type_and_comps
On Fri 14 Aug 2015, Chris Wilson wrote:
On Thu, Aug 13, 2015 at 09:58:52PM -0700, Kenneth Graunke wrote:
On Thursday, August 13, 2015 02:57:20 PM Martin Peres wrote:
On 07/08/15 23:13, Chris Wilson wrote:
intel_update_winsys_renderbuffer_miptree() will release the existing
miptree
On Tue 28 Jul 2015, Nanley Chery wrote:
From: Nanley Chery nanley.g.ch...@intel.com
According to the spec, Tex*Storage* commands are supported if the GL
implementation has support for immutable textures.
Signed-off-by: Nanley Chery nanley.g.ch...@intel.com
---
src/mesa/main/texformat.c
copytexture_error_check, because
glCopyTexImage*D is unable copy pixels to an ASTC texture.
Other than that, this patch looks good to me. Fix that and it's
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Thu 13 Aug 2015, Nanley Chery wrote:
From: Nanley Chery nanley.g.ch...@intel.com
The ASTC spec was revised as follows:
Revision 2, April 28, 2015 - added CompressedTex{Sub,}Image3D to
commands accepting ASTC format tokens in the New Tokens section [...].
Support only exists in the
On Tue 11 Aug 2015, Nanley Chery wrote:
From: Nanley Chery nanley.g.ch...@intel.com
All compressed formats return GL_FALSE. Remove all switch cases for
compressed formats. Compressed formats should be at the bottom of
the switch statement, so ordering is still preserved.
Cc: Jason
On Tue 11 Aug 2015, Nanley Chery wrote:
From: Nanley Chery nanley.g.ch...@intel.com
Only uncompressed formats have a non-void type and actual components per
pixel.
Rename _mesa_format_to_type_and_comps to
_mesa_uncompressed_format_to_type_and_comps and require callers to check if
the
of compressed formats.
Regards,
Nanley
I like the idea of declaring the compression family as a type of texture
layout.
Patch 3/4 is
Reviewed-by: Chad Versace chad.vers...@intel.com
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++--
1 file changed, 17 insertions(+), 135 deletions(-)
I checked every line in this patch and found no errors.
Patch 4/4 is
Reviewed-by: Chad Versace chad.vers...@intel.com
As an aside... Do you think the format's datatype be stored directly in
the Mesa's format info table? It seems
On Tue 28 Jul 2015, Emil Velikov wrote:
Hello Jim,
On 28 July 2015 at 02:57, Bish, Jim jim.b...@intel.com wrote:
From: Jim Bish jim.b...@intel.com
Would you mind splitting this into separate patches ? Adding a few
words in the commit log(s) would be highly preferable.
Yes, please submit
On Wed 22 Jul 2015, Jason Ekstrand wrote:
This needs a *lot* more commentary. These calculations are extremely
tricky and there are almost no comments. For instance, you are
turning a 2D offset on a tiled surface into a new 2D address into the
raw view of the surface. Nowhere do you explain
On Fri 17 Jul 2015, Emil Velikov wrote:
On 17 July 2015 at 19:11, Ilia Mirkin imir...@alum.mit.edu wrote:
On Fri, Jul 17, 2015 at 2:11 PM, Eric Anholt e...@anholt.net wrote:
Matt Turner matts...@gmail.com writes:
On Fri, Jul 17, 2015 at 10:17 AM, Emil Velikov emil.l.veli...@gmail.com
happening in gen8 case before)
Cc: Anuj Phogat anuj.pho...@gmail.com
Cc: Chad Versace chad.vers...@intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
I have one nitpick...
- /* 'requested' parameter of intel_miptree_create_layout() is relevant
-* only for non bo miptree. Tiling
On Tue 14 Jul 2015, Ben Widawsky wrote:
This patch rewrites the logic for determining which method we using for
mapping
a miptree. It is my intention that that this patch, the required patches
before
this do not change functionality, or if they do, it's in very obscure an
unobservable
On Wed 15 Jul 2015, Anuj Phogat wrote:
On Tue, Jul 14, 2015 at 9:56 AM, Ben Widawsky
benjamin.widaw...@intel.com wrote:
At the crux of this change is moving whether or not we can even use the
hardware
blitter into the can_blit_slice check. Fundamentally this makes sense as
blitting a
Don't assume that $(top_srcdir)/.git is a directory. It may be a
gitlink file [1] if $(top_srcdir) is a submodule checkout or a linked
worktree [2].
[1] A gitlink is a text file that specifies the real location of
the gitdir.
[2] Linked worktrees are a new feature in Git 2.5.
Cc: 10.6, 10.5
2015 06:40:14 -0700
Chad Versace (2):
egl: Add support for DRM_FORMAT_R8, RG88, and GR88
i965: Support importing R8 and GR88 dma_bufs
include/GL/internal/dri_interface.h | 9 +++--
src/egl/drivers/dri2/egl_dri2.c | 19 +++
src/mesa/drivers/dri/i965
part of EGL about the new
formats. Real driver support is left for follow-up patches.
CC: Peter Frühberger peter.fruehber...@gmail.com
Cc: Rainer Hochecker rainer.hochec...@onlinehome.de
Signed-off-by: Chad Versace chad.vers...@intel.com
---
src/egl/drivers/dri2/egl_dri2.c | 19
EGL_EXT_image_dma_buf_import now supports those formats.
CC: Peter Frühberger peter.fruehber...@gmail.com
Cc: Rainer Hochecker rainer.hochec...@onlinehome.de
Signed-off-by: Chad Versace chad.vers...@intel.com
---
include/GL/internal/dri_interface.h | 9 +++--
src/mesa/drivers/dri/i965
On Thu 09 Jul 2015, Emil Velikov wrote:
On 9 July 2015 at 09:39, Chad Versace chad.vers...@intel.com wrote:
EGL_EXT_image_dma_buf_import now supports those formats.
Do I have an old version of it (v6) or I simply cannot see those listed ?
I should have been more clear when I said
On Thu 09 Jul 2015, Emil Velikov wrote:
On 9 July 2015 at 21:21, Chad Versace chad.vers...@intel.com wrote:
On Thu 09 Jul 2015, Emil Velikov wrote:
On 9 July 2015 at 09:39, Chad Versace chad.vers...@intel.com wrote:
EGL_EXT_image_dma_buf_import now supports those formats.
Do I have
On Mon 29 Jun 2015, Matt Turner wrote:
---
src/mesa/main/context.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Tue 23 Jun 2015, Ilia Mirkin wrote:
On Tue, Jun 23, 2015 at 12:05 PM, Chad Versace chad.vers...@intel.com wrote:
On Fri 19 Jun 2015, Emil Velikov wrote:
Cc: 10.5 10.6 mesa-sta...@lists.freedesktop.org
Suggested-by: Ilia Mirkin imir...@alum.mit.edu
Signed-off-by: Emil Velikov
$use_https | sort | uniq)
+urls=$(git log $* | grep 'bugs.freedesktop.org/show_bug' | sed -e
$trim_before -e $trim_after -e $use_https | sort-n | uniq)
That can't be right! A space is needed between 'sort' and '-n'.
Add the space, and this is
Reviewed-by: Chad Versace chad.vers...@intel.com
is
Reviewed-by: Emil Velikov emil.l.veli...@gmail.com
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Thu 11 Jun 2015, Ying Liu wrote:
Add pbuffer support for drm platform, because some customers are still using
this feature.
Signed-off-by: Ying Liu ying2@intel.com
---
src/egl/drivers/dri2/egl_dri2.c | 2 +-
src/egl/drivers/dri2/platform_drm.c | 18 ++
2
myself the code is correct.
Reviewed-by: Chad Versace chad.vers...@intel.com
If no one objects, I'll commit this Monday afternoon.
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Annotate offset_components with attribute 'unused'.
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 0f1a286..3c24a87 100644
---
On Mon 08 Jun 2015, Zach Reizner wrote:
From: Haixia Shi h...@chromium.org
The surfaceless platform is for off-screen rendering only. Render node support
is required.
Only consider the render nodes. Do not use normal nodes as they require
auth hooks.
v3: change platform_null to
On Thu 28 May 2015, Marek Olšák wrote:
Hi Chad,
A new patch is attached.
Thanks for the changes. This patch is
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Thu 28 May 2015, Eirik Byrkjeflot Anonsen wrote:
Marek Olšák mar...@gmail.com writes:
I don't understand. Using size_t should prevent the integer overflow.
Is there anything else wrong other than no fail path for malloc? I
also don't understand how calloc can help here.
Marek
On Thu 28 May 2015, Marek Olšák wrote:
A new patch is attached. Please review.
Looks good to me.
Reviewed-by: Chad Versace chad.vers...@intel.com
Later, if and when some platform extension defines a pointer-sized
attribute, then we will need to invert the function order
The last two patches, 14-15, are
Reviewed-by: Chad Versace chad.vers...@intel.com
I think I've reviewed all the patches in this series. Please let me know
if I missed any.
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-gen 8 || mt-num_samples 0 || mt-align_w == 16);
}
Same here.
With some PRM quotes sprinkled in, this patch is
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Thu 28 May 2015, Ben Widawsky wrote:
This restriction was attempted in this commit:
commit 47053464630888f819ef8cc44278f1a1220159b9
Author: Anuj Phogat anuj.pho...@gmail.com
Date: Fri Feb 13 11:21:21 2015 -0800
i965/gen8: Use HALIGN_16 if MCS is enabled for non-MSRT
However, the
On Fri 29 May 2015, Kenneth Graunke wrote:
On Friday, May 29, 2015 12:33:10 PM Chad Versace wrote:
On Fri 29 May 2015, Matt Turner wrote:
On Thu, May 28, 2015 at 10:21 AM, Ben Widawsky
@@ -286,7 +284,7 @@ intel_miptree_create_layout(struct brw_context *brw,
mt-logical_height0
On Fri 29 May 2015, Chad Versace wrote:
On Thu 28 May 2015, Ben Widawsky wrote:
This restriction was attempted in this commit:
commit 47053464630888f819ef8cc44278f1a1220159b9
Author: Anuj Phogat anuj.pho...@gmail.com
Date: Fri Feb 13 11:21:21 2015 -0800
i965/gen8: Use HALIGN_16
On Thu 28 May 2015, Ben Widawsky wrote:
Just like the previous patch, but for the GEN9 constraints.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 5 +
1 file changed, 5 insertions(+)
diff --git
...
This patch, with or without my and Topi's suggestions, is
Reviewed-by: Chad Versace chad.vers...@intel.com
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/46984/),
NOTE: This patch shouldn't actually do anything since SKL doesn't yet use fast
clears, and that's the only case we can get to this function (by way of
intel_update_winsys_renderbuffer_miptree)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
Reviewed-by: Chad Versace chad.vers
as to whether or not it was a good
idea to remove non_msrt since it's a really nice thing for grep.
Cc: Chad Versace chad.vers...@linux.intel.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 37
+++
src/mesa/drivers/dri/i965
On Fri 29 May 2015, Matt Turner wrote:
On Thu, May 28, 2015 at 10:21 AM, Ben Widawsky
@@ -286,7 +284,7 @@ intel_miptree_create_layout(struct brw_context *brw,
mt-logical_height0 = height0;
mt-logical_depth0 = depth0;
mt-fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS;
-
On Thu 28 May 2015, Marek Olšák wrote:
A new patch is attached. Please review.
LGTM.
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Wed 13 May 2015, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
---
src/egl/main/eglapi.c | 9 -
src/egl/main/egldisplay.h | 3 +--
2 files changed, 5 insertions(+), 7 deletions(-)
Patches 1-3 are
Reviewed-by: Chad Versace chad.vers...@intel.com
I'm looking
On Thu 14 May 2015, Emil Velikov wrote:
Hi Marek,
On 12/05/15 22:54, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
with the extension of keeping:
#define KHRONOS_APICALL __attribute__((visibility(default)))
And don't include mesa headers in egl.h.
Can we do this
-by: Chad Versace chad.vers...@intel.com
I'm still reading through the remaining patches.
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EGL_TRUE or EGL_FALSE, this patch
looks good to me.
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Wed 13 May 2015, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
---
src/egl/main/eglapi.c | 14 +-
src/egl/main/eglapi.h | 2 +-
src/egl/main/eglsync.c | 2 +-
src/egl/main/eglsync.h | 2 +-
4 files changed, 16 insertions(+), 4 deletions(-)
I see two
On Fri 15 May 2015, Emil Velikov wrote:
On 12/05/15 22:54, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
---
src/egl/main/eglapi.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
On Sat 23 May 2015, Marek Olšák wrote:
From: Marek Olšák marek.ol...@amd.com
v2: split the commit into 3 patches
Thanks for splitting the patches up. For the series,
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Thu 28 May 2015, Marek Olšák wrote:
Hi Chad,
I broke up the patches and sent them as a separate patch series a few days
ago.
[PATCH 1/3] egl: import egl.h from registry (v2)
[PATCH 2/3] egl: import eglext.h from registry and cleanup eglmesaext.h (v2)
[PATCH 3/3] egl: import platform
with either one.
^^ is not meant as an objection against the patch (if it ever come
across as such).
This little patch fixes the extension, so
Reviewed-by: Chad Versace chad.vers...@intel.com
As Emil, I want to nuke the #ifdef spaghetti too. It's always bothered
me, and I've never understood
opinion, not only non-portable across
different vendor's implementations of libEGL but also across
versions of a single vendor's implementation. So, this patch does
not violate any ABI contract provided Mesa's libEGL.
So, I give it
Reviewed-by: Chad Versace chad.vers...@intel.com
On Mon 11 May 2015, Emil Velikov wrote:
The only user (egl_gallium) is not longer around.
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
For the series,
Reviewed-by: Chad Versace chad.vers...@intel.com
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On Tue 12 May 2015, Chad Versace wrote:
On Mon 11 May 2015, Emil Velikov wrote:
The only user (egl_gallium) is not longer around.
Signed-off-by: Emil Velikov emil.l.veli...@gmail.com
For the series,
Reviewed-by: Chad Versace chad.vers...@intel.com
Um... except for patch 5, the one
On Tue 12 May 2015, Emil Velikov wrote:
The extension requires that the address of the core functions should be
available via eglGetProcAddress. Currently the list is guarded by
_EGL_GET_CORE_ADDRESSES, which was only set for the scons (windows)
build.
Unconditionally enable it for all the
On Wed 06 May 2015, Daniel Stone wrote:
Hi,
On 6 May 2015 at 07:25, Pekka Paalanen ppaala...@gmail.com wrote:
On Wed, 6 May 2015 11:00:13 +1000
Dave Airlie airl...@gmail.com wrote:
On 2 May 2015 at 20:15, Axel Davy axel.d...@ens.fr wrote:
Only EGL_WINDOW_BIT is supported. Remove tests
On Mon 04 May 2015, Daniel Stone wrote:
Hi,
On 1 May 2015 at 21:02, Chad Versace chad.vers...@intel.com wrote:
+static bool
+brw_fence_has_completed(struct brw_fence *fence)
+{
+ if (fence-signalled)
+ return true;
+
+ if (fence-batch_bo !drm_intel_bo_busy(fence
On Fri 01 May 2015, Matt Turner wrote:
On Fri, May 1, 2015 at 1:01 PM, Chad Versace chad.vers...@intel.com wrote:
From: Chad Versace c...@kiwitree.net
Different From: email address?
Oops. I forgot to configure my local .git/config after a fresh clone.
Thanks for catching
From: Chad Versace c...@kiwitree.net
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.
Bug found by code inspection.
---
src/mesa/drivers/dri/i915/intel_syncobj.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i915/intel_syncobj.c
From: Chad Versace c...@kiwitree.net
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.
Bug found by code inspection.
---
src/mesa/drivers/dri/i965/intel_syncobj.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c
From: Chad Versace c...@kiwitree.net
If it returns NULL, then return early with an error.
Cc: Marek Olšák marek.ol...@amd.com
---
src/egl/drivers/dri2/egl_dri2.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index
I'm about to implement DRI2_Fenc in intel_syncobj.c. To prevent
madness, we need to prefix functions for GL_ARB_sync with 'gl' and
functions for DRI2_Fence with 'dri'. Otherwise, the file will become
a jumble of similiarly named functions.
For example:
old-name: intel_client_wait_sync()
---
src/mesa/drivers/dri/i965/intel_syncobj.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c
b/src/mesa/drivers/dri/i965/intel_syncobj.c
index 3bc32df..a425b9e 100644
--- a/src/mesa/drivers/dri/i965/intel_syncobj.c
+++
From: Chad Versace c...@kiwitree.net
This enables EGL_KHR_fence_sync and EGL_KHR_wait_sync.
Below is the difference in piglit results, before and after this patch.
No regressions and several tests improve from 'skip' to 'pass'. Out of
EGL_KHR_fence_sync tests, two of the multithreaded tests skip
---
src/mesa/drivers/dri/i915/intel_syncobj.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i915/intel_syncobj.c
b/src/mesa/drivers/dri/i915/intel_syncobj.c
index 92a246d..92b5b63 100644
--- a/src/mesa/drivers/dri/i915/intel_syncobj.c
+++
The first 6 patches are small cleanups. The real implementation is patch
7/7. Enabling EGL_KHR_fence_sync also gives us EGL_KHR_wait_sync for
free.
This series lives on the tag:
git://github.com/chadversary/mesa
i965-egl-khr-fence-sync-v01
Chad Versace (7):
egl/dri2: Check return value
On Wed 15 Apr 2015, Emil Velikov wrote:
On 14 April 2015 at 17:22, Ian Romanick i...@freedesktop.org wrote:
On 04/14/2015 08:36 AM, Emil Velikov wrote:
On 14 April 2015 at 13:52, Jose Fonseca jfons...@vmware.com wrote:
On 13/04/15 22:59, Ian Romanick wrote:
On 04/10/2015 03:36 PM, Jose
properly depend on server support by not marking it as direct only.
Signed-off-by: Ian Romanick ian.d.roman...@intel.com
Cc: José Fonseca jfons...@vmware.com
Cc: Chad Versace chad.vers...@intel.com
Cc: Emil Velikov emil.l.veli...@gmail.com
---
src/glx/glxextensions.c | 12 +---
1 file changed
= intel_image-mt;
- /* BLORP is not supported before Gen6. */
- if (brw-gen 6 || brw-gen = 8)
+ /* BLORP is only supported for Gen6-7. */
+ if (brw-gen 6 || brw-gen 7)
return false;
if (_mesa_get_format_base_format(src_rb-Format) !=
Reviewed-by: Chad Versace chad.vers...@intel.com
On Fri 10 Apr 2015, Pohjolainen, Topi wrote:
On Thu, Apr 09, 2015 at 08:57:04PM -0700, Chad Versace wrote:
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index a906460..492338b 100644
--- a/src/mesa/drivers/dri/i965
On Fri 10 Apr 2015, Pohjolainen, Topi wrote:
On Thu, Apr 09, 2015 at 08:57:05PM -0700, Chad Versace wrote:
@@ -440,6 +451,10 @@ intel_miptree_create_layout(struct brw_context *brw,
brw_miptree_layout(brw, mt);
+ if (mt-disable_aux_buffers) {
+ assert(mt-msaa_layout
On Fri 10 Apr 2015, Jose Fonseca wrote:
From: José Fonseca jfons...@vmware.com
The latest version of GLX_EXT_create_context_es2_profile states:
If the version requested is a valid and supported OpenGL-ES version,
and the GLX_CONTEXT_ES_PROFILE_BIT_EXT bit is set in the
On Fri 10 Apr 2015, Emil Velikov wrote:
Hi Haixia,
On 18/02/15 02:08, Haixia Shi wrote:
Signed-off-by: Haixia Shi h...@chromium.org
---
src/egl/drivers/dri2/platform_drm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/egl/drivers/dri2/platform_drm.c
On Wed 08 Apr 2015, Frank Henigman wrote:
On Wed, Apr 8, 2015 at 1:28 AM, Chad Versace chad.vers...@intel.com wrote:
On Tue 07 Apr 2015, Kristian Høgsberg wrote:
On Tue, Apr 7, 2015 at 6:46 PM, Frank Henigman fjhenig...@google.com
wrote:
The name surfaceless suits me.
Does this platform
On Wed 08 Apr 2015, Volker Vogelhuber wrote:
On 07.04.2015 21:54, Chad Versace wrote:
On Thu 02 Apr 2015, Axel Davy wrote:
Hi,
you may be interesting look at this related bug report:
https://bugs.freedesktop.org/show_bug.cgi?id=87452#c5
Yours,
Axel Davy
On 02/04/2015 11:58, Volker
On Thu 02 Apr 2015, Axel Davy wrote:
Hi,
you may be interesting look at this related bug report:
https://bugs.freedesktop.org/show_bug.cgi?id=87452#c5
Yours,
Axel Davy
On 02/04/2015 11:58, Volker Vogelhuber wrote :
We currently want to stream OpenGL output to an FPGA that does not
provide
a
On Tue 07 Apr 2015, Kristian Høgsberg wrote:
On Tue, Apr 7, 2015 at 6:46 PM, Frank Henigman fjhenig...@google.com wrote:
The name surfaceless suits me.
Does this platform need to provide a hint to the user about buffer format?
Platform drm does this via the EGL_NATIVE_VISUAL_ID query of
Time to revive this patch!
Why?
- I don't like large patchsets living in Chrome OS for too long.
- Frank submitted Waffle patches to support this, and I hesitate to
add Waffle support unless the platform is upstream.
Of course, the patch no longer applies to master. So I rebased and
pushed
On 03/13/2015 05:59 PM, Matt Turner wrote:
Patch is
Reviewed-by: Chad Versace chad.vers...@intel.com
---
Chad, you suggested it would be nice to remove the locking from
eglQueryString, but I don't see a way to do it. eglQueryString has
to generate EGL_NOT_INITIALIZED if the display is valid
_eglQueryString,
avoid locking the display, and throw out eglmisc.c/eglmisc.h.
Yes, let's get rid of API.QueryString. Mesa's egl/main directory contains
a superfluous amount of virtual dispatch, and API.QueryString is one
of the guilty parties.
I like this patch is. It's
Reviewed-by: Chad Versace
immediately before submitting the batch, not immediately
before
the user wants to use the cpu to build a new batch.
This patch solves my major complaint with the original patches you sent.
Reviewed-by: Chad Versace chad.vers...@intel.com
But... please fix the style conventions in my comments below
are SwapBuffers.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Cc: Kenneth Graunke kenn...@whitecape.org
Cc: Ben Widawsky b...@bwidawsk.net
Cc: Kristian Høgsberg k...@bitplanet.net
Cc: Chad Versace chad.vers...@linux.intel.com
Both patches
Reviewed
of the variable name need_front_throttle, this code looks incorrect for
fbo
rendering, even thought it's not. Please add a comment here explaining that
need_front_throttle is being hijacked for fbo, back, and front buffer rendering.
With that little comment, patch 1 is
Reviewed-by: Chad Versace chad.vers
...@bitplanet.net
Cc: Chad Versace chad.vers...@linux.intel.com
---
src/mesa/drivers/dri/i965/brw_context.c | 19 ---
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 7 ---
3 files changed, 17 insertions(+), 11 deletions
On 02/26/2015 05:24 AM, Chris Wilson wrote:
When rendering to an fbo, even though it may be acting as a winsys
frontbuffer or just generally, we never throttle. However, when rendering
to an fbo, there is no natural frame boundary. Conventionally we use
SwapBuffers and glFinish, but potential
On 03/04/2015 09:52 AM, Chris Wilson wrote:
On Wed, Mar 04, 2015 at 09:41:56AM -0800, Chad Versace wrote:
On 02/26/2015 05:24 AM, Chris Wilson wrote:
When rendering to an fbo, even though it may be acting as a winsys
frontbuffer or just generally, we never throttle. However, when rendering
On 03/02/2015 09:36 PM, Dave Airlie wrote:
On 3 March 2015 at 13:57, Dave Airlie airl...@gmail.com wrote:
Okay I've revised this to add some more info to the interface,
essentially I need to get the fourcc back so I can later pass
it across the wire to the EGL_EXT_image_dma_buf_import, also
On 03/03/2015 11:13 AM, Dave Airlie wrote:
On 4 March 2015 at 05:06, Chad Versace chad.vers...@intel.com wrote:
On 03/03/2015 11:01 AM, Daniel Stone wrote:
Hi,
On 3 March 2015 at 18:40, Chad Versace chad.vers...@intel.com wrote:
On 03/03/2015 12:13 AM, Daniel Stone wrote:
On Tuesday, March
, if an application passes
UINT64_MAX to wait forever, we overflow to -1LL and return immediately.
Work around this mess by clamping the wait timeout to INT64_MAX.
Signed-off-by: Kristian Høgsberg k...@bitplanet.net
Reviewed-by: Chad Versace chad.vers...@intel.com
signature.asc
Description
On 02/23/2015 06:32 AM, Jonny Lamb wrote:
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67676
---
include/EGL/eglmesaext.h| 5 +
src/egl/drivers/dri2/platform_wayland.c | 9 +++--
src/egl/drivers/dri2/platform_x11.c | 22 +-
On 02/23/2015 06:32 AM, Jonny Lamb wrote:
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67676
Reviewed-by: Chad Versace chad.vers...@intel.com
---
docs/specs/EGL_MESA_transparent_alpha.txt | 120
++
1 file changed, 120 insertions(+)
create mode 100644
+--
src/mesa/drivers/dri/i965/intel_fbo.c | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
Otherwise, when using gles, _BaseFormat is set to 0 and a glReadPixels
from the buffer hits an assert.
Tested on i965. Compiled for i915.
Reviewed-by: Chad Versace chad.vers...@intel.com
On 03/03/2015 11:01 AM, Daniel Stone wrote:
Hi,
On 3 March 2015 at 18:40, Chad Versace chad.vers...@intel.com wrote:
On 03/03/2015 12:13 AM, Daniel Stone wrote:
On Tuesday, March 3, 2015, Dave Airlie airl...@gmail.com
mailto:airl...@gmail.com wrote:
+EGLBoolean
On 03/02/2015 06:23 AM, Tom Stellard wrote:
From: Daniel Stone dani...@collabora.com
This fixes almost all piglit regressions when running with
PIGLIT_PLATFORM=gbm
Tom Stellard:
- Fix ARGB2101010 format
Cc: 10.4 10.5 mesa-sta...@lists.freedesktop.org
Reviewed-by: Chad Versace
On 03/03/2015 12:13 AM, Daniel Stone wrote:
Hi,
On Tuesday, March 3, 2015, Dave Airlie airl...@gmail.com
mailto:airl...@gmail.com wrote:
+EGLBoolean eglExportDMABUFImageQueryMESA(EGLDisplay dpy,
+ EGLImageKHR image,
+
== 0) {
+ yoffset = rb-Height - yoffset - height;
+ pixels += (ptrdiff_t) (height - 1) * dst_pitch;
+ dst_pitch = -dst_pitch;
+ }
+
/* We postponed printing this message until having committed to executing
* the function.
*/
Reviewed-by: Chad Versace
On 01/28/2015 03:36 AM, Jason Ekstrand wrote:
Cc: Chad Versace chad.vers...@intel.com
---
src/mesa/drivers/dri/i965/intel_tiled_memcpy.c | 30
+-
src/mesa/drivers/dri/i965/intel_tiled_memcpy.h | 4 ++--
2 files changed, 17 insertions(+), 17 deletions(-)
diff
On 01/28/2015 01:45 PM, jim.br...@linux.intel.com wrote:
From: Jim Bride jim.br...@intel.com
In situations where a DRI2 driver is in use and a call to eglTerminate()
is followed by a call to eglMakeCurrent() the mandatory call to glFlush()
inside of dri2_make_current() would cause a
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