Jason Ekstrand writes:
> Without this bit set, the value in "L3 Atomic Disable" won't get applied by
> the hardware so we won't properly get L3 atomic caching.
>
> Fixes dEQP-VK.spirv_assembly.instruction.compute.opatomic.compex on HSW
>
> Signed-off-by: Jason Ekstrand
Without this bit set, the value in "L3 Atomic Disable" won't get applied by
the hardware so we won't properly get L3 atomic caching.
Fixes dEQP-VK.spirv_assembly.instruction.compute.opatomic.compex on HSW
Signed-off-by: Jason Ekstrand
Cc: Lionel Landwerlin