at
git://git.kiwitree.net/~chadv/mesa
branch review/fix-deqp-framebuffertexture-error
Chad Versace (3):
mesa: Document that _mesa_enum_to_string() returns non-null
mesa: Add _mesa_enum_to_string2()
mesa: Fix glFramebufferTexture* error codes
src/mapi/glapi/gen/gl_enums.py | 24
On 07/26/2016 03:11 PM, Jason Ekstrand wrote:
This patch series builds on the previous one I just sent and reworks the
blorp API to be entirely ISL. The last bits of intel_mipmap_tree are
removed from the ISL internals and shoved into brw_blorp.c/h which simply
serves as a wrapper around the
On 08/09/2016 01:49 PM, Haixia Shi wrote:
> Pinging this thread - any objection to commit this? Thanks.
I pushed it.
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On 08/08/2016 01:58 PM, Rob Herring wrote:
On Mon, Aug 8, 2016 at 1:39 PM, Chad Versace <c...@kiwitree.net> wrote:
On 08/02/2016 04:07 AM, Tomasz Figa wrote:
This patch adds support for YV12 pixel format to the Android platform
backend. Only creating EGL images is supported, it is not
On 08/02/2016 04:07 AM, Tomasz Figa wrote:
Nicolas Boichat (1):
egl/android: Fix support for pbuffers
Tomasz Figa (6):
egl/android: Remove unused variables in
droid_get_buffers_with_format()
egl/android: Respect buffer mask in droid_image_get_buffers
egl/android: Refactor image
On 08/02/2016 04:07 AM, Tomasz Figa wrote:
This patch adds support for YV12 pixel format to the Android platform
backend. Only creating EGL images is supported, it is not added to the
list of available visuals.
v2: Use const array defined just for YV12 instead of trying to be overly
format directly. As a side effect, it
simplifies all existing calls to this function, because they all called
get_format() first to convert from native to DRI_IMAGE_FORMAT.
Signed-off-by: Tomasz Figa <tf...@chromium.org>
Tested-by: Rob Herring <r...@kernel.org>
Reviewed-b
On 08/04/2016 02:28 PM, Martin Peres wrote:
On 05/08/16 00:24, Mark Janes wrote:
I saw no regressions from these tests. However, I wasn't able to run
the dEQP-EGL tests the last time I tried. What branch of dEQP are you
running?
InternalError (Runtime check failed: '(m_capabilities &
On 08/04/2016 02:24 PM, Mark Janes wrote:
I saw no regressions from these tests. However, I wasn't able to run
the dEQP-EGL tests the last time I tried. What branch of dEQP are you
running?
InternalError (Runtime check failed: '(m_capabilities &
CAPABILITY_GET_DISPLAY_PLATFORM) == 0' at
When glEGLImageTargetRenderbufferStorageOES() was given an EGLImage
created from the non-base slice of a miptree,
intel_image_target_renderbuffer_storage() forgot to apply the intra-tile
offsets __DRIimage::tile_x,tile_y to the miptree layout.
This patch fixes the problem with a quick hack
Hi Intel folks, could one of you please run this through Jenkins?
I verified manually that it fixes the listed dEQP tests on Skylake.
Chad Versace (2):
i965: Fix miptree layout for EGLImage-based renderbuffers
i965: Respect miptree offsets in intel_readpixels_tiled_memcpy()
src/mesa/drivers
Respect intel_miptree_slice::x_offset,y_offset and
intel_mipmap_tree::offset. All three may be non-zero when glReadPixels
is called on an EGLImage created from the non-base slice of a miptree.
Patch 2/2 that fixes test
'dEQP-EGL.functional.image.create.gles2_cubemap_*'.
Reported-by: Haixia Shi
On 08/02/2016 06:40 PM, Enrico Weigelt, metux IT consult wrote:
Hi folks,
is there still a real need for having non-shared glapi ?
Otherwise, should we remove it ?
+1
I have the same question.
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rg>
Cc: Jason Ekstrand <jason.ekstr...@intel.com>
Cc: kenneth.w.grau...@intel.com
Cc: Chad Versace <c...@kiwitree.net>
Change-Id: I461ad5b204626d5a1c45611fc6b63735dcf29f63
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by:
kenneth.w.grau...@intel.com
Cc: Chad Versace <c...@kiwitree.net>
Change-Id: I461ad5b204626d5a1c45611fc6b63735dcf29f63
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i96
On 08/02/2016 04:35 PM, Chad Versace wrote:
On 08/02/2016 04:17 PM, Haixia Shi wrote:
We need to include mt->offset in the calculation of src pointer
because its
value may be non-zero, for example in a cubemap texture.
Signed-off-by: Haixia Shi <h...@chromium.org>
Cc: Jason
kenneth.w.grau...@intel.com
Cc: Chad Versace <c...@kiwitree.net>
Change-Id: I461ad5b204626d5a1c45611fc6b63735dcf29f63
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/
+), 42 deletions(-)
Reviewed-by: Chad Versace <c...@kiwitree.net>
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of unavailable buffers.
Signed-off-by: Tomasz Figa <tf...@chromium.org>
---
src/egl/drivers/dri2/platform_android.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
Reviewed-by: Chad Versace <c...@kiwitree.net>
On 08/02/2016 04:07 AM, Tomasz Figa wrote:
Fix compilation warnings due to unused variables left after some earlier
code changes.
Signed-off-by: Tomasz Figa <tf...@chromium.org>
---
src/egl/drivers/dri2/platform_android.c | 3 ---
1 file changed, 3 deletions(-)
Reviewed-by: Chad Vers
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> ---
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Thu 14 Jul 2016, Chad Versace wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> > ---
> > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > src/mesa/drivers/dri
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> ---
> src/mesa/drivers/dri/i965/gen6_blorp.c | 76
> +-
> 1 file changed, 2 insertions(+), 74 deletions(-)
Patches 14-18 are
Revi
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 2:26 PM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> > > ---
>
mesa/drivers/dri/i965/gen7_wm_surface_state.c | 1 -
> src/mesa/drivers/dri/i965/gen8_surface_state.c| 1 -
> 4 files changed, 1 insertion(+), 21 deletions(-)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
I'm done with all the non-blorp patches, I believe. Let me know if
I missed anything. I'l
rces | 1 -
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 7
> src/mesa/drivers/dri/i965/gen6_surface_state.c | 48
>
> 3 files changed, 7 insertions(+), 49 deletions(-)
> delete mode 100644 src/mesa/drivers/dri/i965/gen6_surface_state.
ed, 2 insertions(+), 263 deletions(-)
That diff has a lot of -'s :) Bye bye code!
Looks good to me,
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 94
> +---
> 1 file changed, 1 insertion(+), 93 deletions(-)
Patches 28 and 29 are
Revi
/gen8_surface_state.c| 9 +
> 3 files changed, 16 insertions(+), 13 deletions(-)
Patches 30 and 31 are
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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| 42 --
> 7 files changed, 55 insertions(+), 148 deletions(-)
Patch 32 is
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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ged, 1 insertion(+), 200 deletions(-)
More --'s !
Patches 26 and 27 (the gen7 patches) are
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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L_SURF_USAGE_CUBE_BIT;
> +
> + brw_emit_surface_state(brw, mt, ,
> + surface_state_infos[brw->gen].tex_mocs,
> for_gather,
> + surf_offset, surf_index,
> + I915_GEM_DOMAIN_SAMPLER, 0);
> + }
Looks good.
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 3:10 PM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > ---
> > > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
> > +
On Thu 14 Jul 2016, Chad Versace wrote:
> On Thu 14 Jul 2016, Chad Versace wrote:
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> > > ---
> > > src/mesa/drivers/dri/i965/brw_state.h
---
> 1 file changed, 11 insertions(+), 11 deletions(-)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32
>
> 1 file changed, 21 insertions(+), 11 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
>
On Thu 14 Jul 2016, Chad Versace wrote:
> On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> > ---
> > src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> > src/mesa/drivers/dri
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_state.h| 8 +++
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 79
>
> 2 files changed, 87 insertions(+)
>
>
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 1:54 PM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> &
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_blorp.c | 157
> ++
> src/mesa/drivers/dri/i965/brw_blorp.h | 6 ++
> 2 files changed, 163 insertions(+)
>
> diff --git
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 120
> ++
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++
> 2 files changed, 125 insertions(+)
>
>
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 11:56 AM, Jason Ekstrand <ja...@jlekstrand.net>
> wrote:
>
> >
> >
> > On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace <chad.vers...@intel.com>
> > wrote:
> >
> >> On Wed
On Thu 14 Jul 2016, Jason Ekstrand wrote:
> On Thu, Jul 14, 2016 at 11:42 AM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > On Wed 13 Jul 2016, Jason Ekstrand wrote:
> > > Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> &
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> Reviewed-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 175
> +-
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 +
> 2 files changed, 179 insertions(+), 2
/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -802,6 +802,10 @@ intel_miptree_get_isl_surf(struct brw_context *brw,
> const struct intel_mipmap_tree *mt,
> struct isl_surf *surf);
>
> +union isl_color_value
> +intel_miptree_get_isl_clear_c
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_context.c | 2 ++
> src/mesa/drivers/dri/i965/brw_context.h | 4
> 2 files changed, 6 insertions(+)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
__
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Wed 13 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Thu 14 Jul 2016, Pohjolainen, Topi wrote:
>
> Subject says: "isl/state: Divide the aux qpitch by 2". Should be
> divide by 4 or shift by 2.
>
> Otherwise:
>
> Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
Ditto. Fix that and
Reviewed-by:
On Wed 13 Jul 2016, Jason Ekstrand wrote:
> On Wed, Jul 13, 2016 at 10:16 AM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > On Sat 09 Jul 2016, Jason Ekstrand wrote:
> > > ---
> > > src/intel/isl/isl.c | 32
> > ++
;aux_usage == ISL_AUX_USAGE_MCS ||
> + info->aux_usage == ISL_AUX_USAGE_CCS_D);
> + s.MCSBaseAddress = info->aux_address,
> + s.MCSSurfacePitch = pitch_in_tiles - 1;
> + s.MCSEnable = true;
> +#endif
> + }
> #endif
I re
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 32
> src/intel/isl/isl.h | 14 ++
> src/intel/isl/isl_format_layout.csv | 9 +
> src/intel/isl/isl_gen7.c| 7 +++
>
On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Jul 12, 2016 4:14 PM, "Chad Versace" <chad.vers...@intel.com> wrote:
> >
> > On Tue 12 Jul 2016, Jason Ekstrand wrote:
> > > On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace <chad.vers...@intel.com>
> >
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.h | 26 ++
> 1 file changed, 26 insertions(+)
Patch 13 is
Reviewed-by: Chad Versace <chad.vers...@intel.com>
I skipped patch 12. I'll re
On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > I believe isl_gen7.c needs more updates:
> >
> > static uint32_t
> > gen7_choose_halign_el(const struct isl_device *d
On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > Also, isl.c needs an update in this hunk:
> >
> ># isl.c
> >if (isl_surf_usage_is_depth_or_stencil(info->usa
On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 2:36 PM, Chad Versace <chad.vers...@intel.com>
> wrote:
>
> > TODO: hiz in script
> >
>
> Thanks to the script being rewritten in a *sane* programming language,
> there's nothing to ch
adds the format to the csv.
And, in that capacity, this patch is ok.
Reviewed-by: Chad Versace <chad.vers...@intel.com>
A warning, though. Before this code is actually used, you will need to
update many of the places where isl_format_is_compressed() is called.
___
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 11 +++
> src/intel/isl/isl.h | 17 +
> src/intel/isl/isl_format_layout.csv | 1 +
> src/intel/isl/isl_gen6.c| 8
> src/intel/isl/isl_gen7.c
d to be defined.
> */
> assert(phys_slice0_sa->w % fmtl->bw == 0);
> - row_pitch = MAX(row_pitch, fmtl->bs * (phys_slice0_sa->w / fmtl->bw));
> + uint32_t bs = fmtl->bpb / 8;
> + row_pitch = MAX(row_pitch, bs * (p
format_bpb,
> struct isl_tile_info *tile_info)
Almost. You need to also update the prototype in isl.h. Do that, and
this patch is
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 2 +-
> src/intel/isl/isl_gen6.c | 2 +-
> src/intel/isl/isl_gen7.c | 2 +-
> src/intel/isl/isl_storage_image.c| 4
nt8_t bh; /**< Block height, in pixels */
Small nit: There's no need for the newline there. They're all "block"
fields, after all.
Either way,
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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insertions(+), 19 deletions(-)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Tue 12 Jul 2016, Jason Ekstrand wrote:
> On Tue, Jul 12, 2016 at 11:50 AM, Chad Versace <chad.vers...@intel.com>
> wrote:
> > Here...
> >
> > > + uint32_t pad_bytes;
> > > + isl_apply_surface_padding(dev, info, _info, _h_el,
> > _bytes);
&g
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> This is based on a very long set of discussions between Chad and myself
> about how we should properly represent HiZ and CCS buffers. The end result
> of that discussion was that a tiling actually has two different sizes, a
> logical size in elements,
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> ---
> src/intel/isl/isl.c | 52 +---
> 1 file changed, 25 insertions(+), 27 deletions(-)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index decba3d..6f57ac2 100644
> ---
On Sat 09 Jul 2016, Jason Ekstrand wrote:
> This series can be found on my freedesktop.org cgit here:
>
>https://cgit.freedesktop.org/~jekstrand/mesa/?h=wip/hiz-v1
For anyone else who is reviewing, the correct branch name is
'review/isl-aux'.
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Patches 1 and 2 are
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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witree.net/~chadv/libdrm/log/?h=wip/intel-fence-fds
Nothing is tested (but at least it builds). Before testing anything,
I plan to wait until I have a working kernel branch for the i915
interface.
Chad Versace (10):
egl: Use atomic ops on _EGLResource::RefCount
todo! dri: Questions abou
TODO: The i915 kernel interface nor the libdrm interface is upstream
yet. So small details may change between now and the final patch.
TODO: Agree on fd ownership rules between EGL and driver with Rob Clark.
TODO: Handle errors from ppoll().
TODO: Test it!
---
From: Rob Clark
Required to implement EGL_ANDROID_native_fence_sync.
Signed-off-by: Rob Clark
---
include/GL/internal/dri_interface.h | 44 -
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git
A variant of intel_batchbuffer_flush() with parameters for in and out
fence fds.
TODO: The i915 kernel interface is not yet upstream.
TODO: The fence variants of libdrm functions drm_intel_*_exec() are not
upstream.
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 30
Don't set SyncCondition twice.
---
src/egl/main/eglsync.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/egl/main/eglsync.c b/src/egl/main/eglsync.c
index 375f223..d65fbdd 100644
--- a/src/egl/main/eglsync.c
+++ b/src/egl/main/eglsync.c
@@ -119,7 +119,6 @@ _eglInitSync(_EGLSync *sync,
See the comments.
---
src/egl/drivers/dri2/egl_dri2.c | 12
1 file changed, 12 insertions(+)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index c7b81ce..03ed4b9 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@
The function is tiny and called exactly once. There's no need for it to
exist.
---
src/mesa/drivers/dri/i965/intel_syncobj.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c
b/src/mesa/drivers/dri/i965/intel_syncobj.c
From: Rob Clark
Reduce the noise in the next patch. For EGL_SYNC_NATIVE_FENCE_ANDROID
the sync condition is conditional on EGL_SYNC_NATIVE_FENCE_FD_ANDROID
attribute.
Signed-off-by: Rob Clark
---
src/egl/main/eglsync.c | 16
Mesa was incrementing and decrementing EGL refcounts with ++ and --.
---
src/egl/main/egldisplay.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/egl/main/egldisplay.c b/src/egl/main/egldisplay.c
index bbc3063..78b5d20 100644
--- a/src/egl/main/egldisplay.c
Close the sync fd *after* the sync's refcount drops to 0.
---
src/egl/drivers/dri2/egl_dri2.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index a9d351e..c7b81ce 100644
---
See the comments.
---
include/GL/internal/dri_interface.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/internal/dri_interface.h
index 99c83ec..051ddb4 100644
--- a/include/GL/internal/dri_interface.h
+++
This bool maps to I915_PARAM_HAS_EXEC_FENCE_FD.
TODO: The i915 param is not yet upstream. Wait for the kernel interface
before committing.
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
src/mesa/drivers/dri/i965/intel_screen.h | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
From: Rob Clark
[chadv]: Fix bugs in attribute parsing.
Signed-off-by: Rob Clark
---
src/egl/drivers/dri2/egl_dri2.c | 49 +
src/egl/main/eglapi.c | 36 +++---
Cacheing the signal status complicates the code for questionable
performance benefit. I added the cacheing long ago, and I now think it
was the wrong decision.
---
src/mesa/drivers/dri/i965/intel_syncobj.c | 28 +++-
1 file changed, 3 insertions(+), 25 deletions(-)
diff
Move the error handling into a little helper function. This will keep
the code clean when later adding error handling for attribute
EGL_SYNC_NATIVE_FENCE_FD_ANDROID.
And fix the log message to work when EGLAttrib is 32-bit or 64-bit.
---
src/egl/main/eglsync.c | 31
/~chadv/mesa/log/?h=review/egl-sync-cleanups-v01
Chad Versace (4):
egl: Add _eglConvertIntsToAttribs()
egl: Fix type errors in _eglParseSyncAttribList64()
egl: Refactor errors for bad EGLSync attributes
egl: Unify attrib parsing of eglCreateSync, eglCreateSyncKHR
src/egl/main/eglapi.c | 41
This function converts an attribute list from EGLint[] to EGLAttrib[].
Will be use in following patches to cleanup EGLSync attribute parsing.
---
src/egl/main/eglapi.c | 41 +
src/egl/main/eglapi.h | 2 ++
2 files changed, 43 insertions(+)
diff --git
eglCreateSyncKHR takes an attribute list of type EGLint[]. eglCreateSync
takes one of type EGLAttrib[]. Implement eglCreateSyncKHR's attribute
parsing in terms of eglCreateSync's by converting the EGLint[] into
EGLAttrib[].
This cleanup will simplify the code when later implementing
- The list elements have type EGLAttrib, not EGLint.
- The array index iterator should be size_t, not EGLint.
---
src/egl/main/eglsync.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/egl/main/eglsync.c b/src/egl/main/eglsync.c
index 33625e9..48714d1 100644
'true' is not valid for VkDependencyFlags.
---
src/intel/vulkan/anv_dump.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_dump.c b/src/intel/vulkan/anv_dump.c
index 1dc5079..49a5ae2 100644
--- a/src/intel/vulkan/anv_dump.c
+++
Swap srcAccessMask and dstAccessMask.
---
src/intel/vulkan/anv_dump.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_dump.c b/src/intel/vulkan/anv_dump.c
index 49a5ae2..4a5a44f 100644
--- a/src/intel/vulkan/anv_dump.c
+++ b/src/intel/vulkan/anv_dump.c
image(cmd_buffer, (struct anv_image *)iview->image, aspect,
> +iview->base_mip, iview->base_layer, filename);
The cast is unneeded. The type is already (struct anv_image *).
Drop the cast and this is
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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On Fri 17 Jun 2016, Jason Ekstrand wrote:
> ---
> src/intel/vulkan/anv_dump.c | 22 ++
> 1 file changed, 22 insertions(+)
Patch 4 is
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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b892c..0fee93c 100644
> --- a/src/intel/vulkan/anv_dump.c
> +++ b/src/intel/vulkan/anv_dump.c
Patch 3 is
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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Patches 1 and 2 are
Reviewed-by: Chad Versace <chad.vers...@intel.com>
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files changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
And pushed.
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snippet to the commit message:
Fixes: piglit "spec/egl 1.4/eglcreatepbuffersurface and then glclear"
Fixes: piglit "spec/egl 1.4/largest possible eglcreatepbuffersurface and
then glclear"
I pushed and gave it my
Reviewed-by: Chad Versace <chad.vers...@intel.com>
_
/egl/main/egldisplay.c | 29 ++---
> 1 file changed, 14 insertions(+), 15 deletions(-)
Reviewed-by: Chad Versace <chad.vers...@intel.com>
And pushed.
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On Fri 01 Jul 2016, Chad Versace wrote:
> On Thu 30 Jun 2016, Stéphane Marchesin wrote:
> > On Thu, Jun 30, 2016 at 3:20 PM, Gurchetan Singh
> > <gurchetansi...@chromium.org> wrote:
> > > There are a few places in the code where clearing and reading are done on
&g
On Wed 06 Jul 2016, Chad Versace wrote:
> On Mon 20 Jun 2016, Guillaume Charifi wrote:
> > Fixes a regression induced by commit
> > a0674ce5c41903ccd161e89abb149621bfbc40d2:
> > When EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET were both specified (and
> > both !
On Mon 20 Jun 2016, Guillaume Charifi wrote:
> Fixes a regression induced by commit a0674ce5c41903ccd161e89abb149621bfbc40d2:
> When EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET were both specified (and
> both != EGL_NO_TEXTURE), an error was instantly triggered, before the
> other one had even a
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