Re: [Mesa-dev] [PATCH] ac/nir: fixup layer/viewport export for GFX9.

Reviewed-by: Bas Nieuwenhuizen On Thu, Aug 17, 2017, at 06:27, Dave Airlie wrote: > From: Dave Airlie > > GFX9 moved where the viewport index export goes. > > Signed-off-by: Dave Airlie > --- > src/amd/common/ac_nir_to_llvm.c

Re: [Mesa-dev] [PATCH 03/45] mesa/st: Handle 16-bit types at st_glsl_attrib_type_size

On 08/15/2017 10:57 PM, Jason Ekstrand wrote: > > On Fri, Jul 14, 2017 at 10:27 AM, Marek Olšák > wrote: > > Can you move these cases to the end where the assertion is? > > > Agreed. In general, I think it's best to let 16-bit types hit >

Re: [Mesa-dev] [PATCH 01/20] vl: add MJPEG profile and format

Am 16.08.2017 um 19:53 schrieb Leo Liu: v2: move util video change to here Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/auxiliary/util/u_video.h | 3 +++ src/gallium/include/pipe/p_video_enums.h | 6 -- 2 files

Re: [Mesa-dev] [RFC PATCH 2/2] main/format: skip format conversion if src and dst format are equal

On Thu, Aug 17, 2017 at 10:52 AM, Erik Faye-Lund wrote: > On Wed, Aug 16, 2017 at 8:32 PM, Karol Herbst wrote: >> Fixes 'KHR-GL45.copy_image.functional' on Nouveau >> >> Signed-off-by: Karol Herbst >> --- >>

Re: [Mesa-dev] [PATCH 17/20] radeon/uvd: add YUYV format support for target buffer

On 08/17/2017 05:15 AM, Christian König wrote: Am 16.08.2017 um 19:53 schrieb Leo Liu: YUYV is a packed YUV format, and there is no chorma plane v2: add stream type check for YUYV pitch setup Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_uvd.c | 8 ++--

Re: [Mesa-dev] [PATCH 17/20] radeon/uvd: add YUYV format support for target buffer

Am 17.08.2017 um 12:27 schrieb Leo Liu: On 08/17/2017 05:15 AM, Christian König wrote: Am 16.08.2017 um 19:53 schrieb Leo Liu: YUYV is a packed YUV format, and there is no chorma plane v2: add stream type check for YUYV pitch setup Signed-off-by: Leo Liu ---

Re: [Mesa-dev] [PATCH 02/45] glsl: Add 16-bit types

On 08/15/2017 10:56 PM, Jason Ekstrand wrote: > > On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro > wrote: > > From: Eduardo Lima Mitev > > > Adds new INT16, UINT16 and HALF FLOAT base

Re: [Mesa-dev] [RFC PATCH 2/2] main/format: skip format conversion if src and dst format are equal

On Wed, Aug 16, 2017 at 8:32 PM, Karol Herbst wrote: > Fixes 'KHR-GL45.copy_image.functional' on Nouveau > > Signed-off-by: Karol Herbst > --- > src/mesa/main/format_utils.c | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git

Re: [Mesa-dev] [PATCH 04/20] radeon/uvd: add MJPEG support

Am 16.08.2017 um 19:53 schrieb Leo Liu: There is no need of dpb buffer for mjpeg codec v2: check dpb_size instead of format Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_uvd.c | 31

Re: [Mesa-dev] [PATCH 1/2] gallium: Add PIPE_CAP_USER_MEMORY_PAGE_SIZE for page size of user pointers

Am 17.08.2017 um 06:30 schrieb Jan Vesely: On Wed, 2017-08-16 at 23:49 -0400, Alex Deucher wrote: On Wed, Aug 16, 2017 at 11:34 PM, Michel Dänzer wrote: On 17/08/17 12:33 PM, Aaron Watry wrote: On Wed, Aug 16, 2017 at 9:48 PM, Alex Deucher wrote:

Re: [Mesa-dev] [PATCH] dri: fix typo in comment

On Friday, 2017-08-11 01:18:57 +0900, Gwan-gyeong Mun wrote: > Signed-off-by: Mun Gwan-gyeong R-b and pushed, thank :) > --- > include/GL/internal/dri_interface.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/GL/internal/dri_interface.h

Re: [Mesa-dev] [PATCH 07/20] st/va: create decoder for MJPEG format

Am 16.08.2017 um 19:53 schrieb Leo Liu: Mjpeg doesn't need reference Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/state_trackers/va/picture.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git

Re: [Mesa-dev] [PATCH 17/20] radeon/uvd: add YUYV format support for target buffer

Am 16.08.2017 um 19:53 schrieb Leo Liu: YUYV is a packed YUV format, and there is no chorma plane v2: add stream type check for YUYV pitch setup Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_uvd.c | 8 ++-- src/gallium/drivers/radeonsi/si_uvd.c | 2 +-

Re: [Mesa-dev] [PATCH 05/20] radeon/video: add MJPEG support

Am 16.08.2017 um 19:53 schrieb Leo Liu: v2: add ASIC and Kernel version check Signed-off-by: Leo Liu --- src/gallium/drivers/radeon/radeon_video.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_video.c

Re: [Mesa-dev] [Mesa-stable] [PATCH 3/4] ac/nir: fix 64-bit shifts

I see. I'll leave it out, then. Thanks for the clarification! ☺ On Wed, 2017-08-16 at 20:58 -0400, Connor Abbott wrote: > I didn't enable the Int64 capability for radv until the next patch in > this series, so the problem this fixes was never exposed to users at > all. I just ran into it when

[Mesa-dev] i965/radeonsi use STD430 packing of UBOs by default

Shared (the default) and packed layouts are decided by the implementation. Currently we just pack them using the std140 layout. This change makes it so we use the slightly more compact std430 layout on i965 and radeonsi. I doubt this will help many games, but it still seems worth implementing. I

[Mesa-dev] [PATCH 03/11] glsl: pass UseSTD430AsDefaultPacking to where it will be used

Here we also make use of the UseSTD430AsDefaultPacking constant and call the new get_internal_ifc_packing() helper. --- src/compiler/glsl/ir_optimization.h | 2 +- src/compiler/glsl/link_uniform_blocks.cpp | 17 +++ src/compiler/glsl/link_uniforms.cpp | 50

[Mesa-dev] [PATCH 08/11] mesa/st: add LOAD support for UBOs

This will allow us to use STD430 packing by default if the driver supports it. --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 198 + 1 file changed, 119 insertions(+), 79 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp

[Mesa-dev] [PATCH 09/11] radeonsi: make use of LOAD for UBOs

--- src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 23 +++ 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c index f8c99ff7e7..05ca710094 100644 ---

[Mesa-dev] [PATCH 10/11] gallium: introduce PIPE_CAP_LOAD_UBO

--- src/gallium/docs/source/screen.rst | 2 ++ src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 + src/gallium/drivers/freedreno/freedreno_screen.c | 1 + src/gallium/drivers/i915/i915_screen.c | 1 + src/gallium/drivers/llvmpipe/lp_screen.c | 1 +

[Mesa-dev] [PATCH 11/11] radeonsi: enable STD430 packing of UBOs by default

Before this change we were defaulting to STD140 which is slightly less efficient at packing arrays. --- src/gallium/drivers/radeonsi/si_pipe.c | 2 +- src/mesa/state_tracker/st_context.c| 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 05/11] gallium: add UBO type to tgsi_file_type

This will be use to distinguish between load types when using the TGSI_OPCODE_LOAD opcode. --- src/gallium/auxiliary/tgsi/tgsi_strings.c | 1 + src/gallium/include/pipe/p_shader_tokens.h | 1 + 2 files changed, 2 insertions(+) diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c

[Mesa-dev] [PATCH 01/11] mesa: add UseSTD430AsDefaultPacking constant

This will be used to enable the STD430 layout as the default for UBOs and SSBOs with layouts of shared/packed rather than STD140. --- src/mesa/main/mtypes.h | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index 49eb7d54bd..e6b726834f

[Mesa-dev] [PATCH 07/11] mesa/st: create add_buffer_to_load_and_stores() helper

Will be used to add LOAD support to UBOs. --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 46 ++ 1 file changed, 27 insertions(+), 19 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index

[Mesa-dev] [PATCH 04/11] i965: enable STD430 packing by default on IVB+

--- src/mesa/drivers/dri/i965/brw_context.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index d97a24fbf8..8485e8a30c 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++

[Mesa-dev] [PATCH 02/11] glsl: add get_internal_ifc_packing() type helper

This is used to avoid code duplication when selecting the packing type for shared and packed layouts. --- src/compiler/glsl_types.h | 21 + 1 file changed, 21 insertions(+) diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h index f67465e6c8..3c18f6cce5 100644

[Mesa-dev] [PATCH 06/11] mesa/st: simplify some UBO index logic

--- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index f4f3092fe0..9688400ed4 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++

Re: [Mesa-dev] [PATCH 1/2] gallium: Add PIPE_CAP_USER_MEMORY_PAGE_SIZE for page size of user pointers

On Thu, 2017-08-17 at 11:54 +0200, Christian König wrote: > Am 17.08.2017 um 06:30 schrieb Jan Vesely: > > On Wed, 2017-08-16 at 23:49 -0400, Alex Deucher wrote: > > > On Wed, Aug 16, 2017 at 11:34 PM, Michel Dänzer > > > wrote: > > > > On 17/08/17 12:33 PM, Aaron Watry

Re: [Mesa-dev] [PATCH] radeon/ac: use ds_swizzle for derivs on si/cik.

Hi Dave, this patch has been collected for 17.2.0-rc3 but, for 17.1.x, the conflicts are not so trivial and the landed commit was tagged for stable without specifying the actual branch. Therefore, unless you intended this also for 17.1.x and would like to provide a backport, I'm more keen on

Re: [Mesa-dev] [PATCH 1/2] gallium: Add PIPE_CAP_USER_MEMORY_PAGE_SIZE for page size of user pointers

Am 17.08.2017 um 13:54 schrieb Jan Vesely: On Thu, 2017-08-17 at 11:54 +0200, Christian König wrote: [SNIP] In general ATS works completely different to GPUVM and is rather bound to the CPU page tables. But GPUVM on everything before Vega10 has a so called fragmentation size in their page

Re: [Mesa-dev] [PATCH shader-db 1/1] shaders: Add Dolphin’s übershaders

Hi Emmanuel, On 5 August 2017 at 04:35, Emmanuel Gil Peyrot wrote: > These shaders have been generated by Dolphin 9649494f67 on Mesa > 8c26b52349 for an HD4000 GPU. > > They include a lot of uniform branches, mostly on integers, as well as > switch statements branching on

Re: [Mesa-dev] [Nouveau] [PATCH] nvc0: fix handling of inverted render condition

So ... how do you handle the case of a query that hasn't completed yet and one of the no-wait enums is passed in? On Thu, Aug 17, 2017 at 4:43 PM, Tobias Klausmann wrote: > Wether we wait on an inverted rendering condition or not, we should not render > on a

Re: [Mesa-dev] [PATCH 2/2] intel/isl: Replace switch statements of doom with a macro

On Thursday, August 17, 2017 2:57:17 PM PDT Jason Ekstrand wrote: > void > isl_buffer_fill_state_s(const struct isl_device *dev, void *state, > const struct isl_buffer_fill_state_info *restrict > info) > { > - switch (ISL_DEV_GEN(dev)) { > - case 4: > - case 5: >

[Mesa-dev] [PATCH] mesa: Deal with size differences between GLuint and GLhandleARB in GetAttachedObjectsARB

Signed-off-by: Jeremy Huddleston Sequoia CC: Nicolai Hähnle CC: Matt Turner CC: Ian Romanick CC: Brian Paul --- src/mesa/main/shaderapi.c | 22 +++--- 1 file changed, 15

[Mesa-dev] [PATCH] radv: disable support for VEGA for now.

From: Dave Airlie I'm working on this, but I'm not sure I'll make 17.2 at this stage, maybe 17.2.1. Cc: "17.2" Signed-off-by: Dave Airlie --- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c | 5 + 1 file

Re: [Mesa-dev] [PATCH 1/9] ralloc: Allow reparenting to a NULL context

On 18/08/17 09:05, Kenneth Graunke wrote: On Thursday, August 17, 2017 10:22:15 AM PDT Jason Ekstrand wrote: --- src/util/ralloc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/util/ralloc.c b/src/util/ralloc.c index bf46439..4015c7e 100644 --- a/src/util/ralloc.c

[Mesa-dev] [PATCH] glsl: set old ldexp operand to NULL when lowering

This fixes an assert during IR validation in LLVMpipe. Fixes: e2e2c5abd279 (glsl: calculate number of operands in an expression once) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102274 Cc: Brian Paul --- src/compiler/glsl/lower_instructions.cpp | 1 + 1 file

[Mesa-dev] [PATCH] nvc0: fix handling of inverted render condition

Wether we wait on an inverted rendering condition or not, we should not render on a passed query. This fixes the CTS test case 'KHR-GL45.conditional_render_inverted.functional'. Signed-off-by: Tobias Klausmann ---

[Mesa-dev] [PATCH 1/2] i965: Make a BRW_NEW_FAST_CLEAR_COLOR dirty bit.

When changing fast clear colors, we need to emit new SURFACE_STATE with the updated color at the next draw call. Most things work today because the atoms that handle SURFACE_STATE for images (mutable images, textures, render targets) also listen to BRW_NEW_BLORP, causing us to re-emit these on

[Mesa-dev] [PATCH 2/2] i965: Drop BRW_NEW_BLORP from SURFACE_STATE setup code.

BLORP invalidates the binding tables, but it doesn't destroy any of the existing SURFACE_STATE entries in the statebuffer. We can reuse those. --- src/mesa/drivers/dri/i965/brw_gs_surface_state.c | 4 src/mesa/drivers/dri/i965/brw_tcs_surface_state.c | 4

Re: [Mesa-dev] [PATCH] mesa: count uniform against storage when its bindless

On Tuesday, August 15, 2017 3:42:29 AM PDT Timothy Arceri wrote: > Gallium drivers use this code path so we need to account for > bindless after all. Why do Gallium drivers use ir_to_mesa? That seems like a misfeature. i965 stopped using it years ago. --Ken signature.asc Description: This is

[Mesa-dev] [PATCH 3/3] anv: Use ISL for emitting null surface states.

--- src/intel/vulkan/genX_cmd_buffer.c | 20 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 280efcc2245..c5735b27e02 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++

[Mesa-dev] [PATCH 2/2] intel/isl: Replace switch statements of doom with a macro

--- src/intel/isl/isl.c | 135 +++- 1 file changed, 39 insertions(+), 96 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 1339867..3788f9c 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1742,6 +1742,42 @@

[Mesa-dev] [PATCH 1/2] intel/isl: Reduce header file duplication

--- src/intel/isl/isl_emit_depth_stencil.c | 4 -- src/intel/isl/isl_genX_priv.h | 45 src/intel/isl/isl_priv.h | 126 + src/intel/isl/isl_surface_state.c | 4 -- 4 files changed, 78 insertions(+), 101 deletions(-)

Re: [Mesa-dev] [PATCH] mesa: count uniform against storage when its bindless

On 18/08/17 08:30, Kenneth Graunke wrote: On Tuesday, August 15, 2017 3:42:29 AM PDT Timothy Arceri wrote: Gallium drivers use this code path so we need to account for bindless after all. Why do Gallium drivers use ir_to_mesa? That seems like a misfeature. Because Gallium drivers still use

Re: [Mesa-dev] [PATCH 04/11] i965: enable STD430 packing by default on IVB+

On 18/08/17 00:33, Jason Ekstrand wrote: On Thu, Aug 17, 2017 at 4:03 AM, Timothy Arceri > wrote: --- src/mesa/drivers/dri/i965/brw_context.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

Re: [Mesa-dev] [PATCH] radv: disable support for VEGA for now.

r-b On Fri, Aug 18, 2017, at 01:39, Dave Airlie wrote: > From: Dave Airlie > > I'm working on this, but I'm not sure I'll make 17.2 at this stage, > maybe 17.2.1. > > Cc: "17.2" > Signed-off-by: Dave Airlie > --- >

Re: [Mesa-dev] [PATCH 1/9] ralloc: Allow reparenting to a NULL context

On Thursday, August 17, 2017 10:22:15 AM PDT Jason Ekstrand wrote: > --- > src/util/ralloc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/util/ralloc.c b/src/util/ralloc.c > index bf46439..4015c7e 100644 > --- a/src/util/ralloc.c > +++ b/src/util/ralloc.c > @@

[Mesa-dev] [PATCH 1/3] isl: Add a null surface fill function.

ISL already offers functions to fill out most kinds of SURFACE_STATE, so why not handle null surfaces too? Null surfaces are simple, so we can just take the dimensions, rather than an entirte fill structure. --- src/intel/isl/isl.c | 7 +++ src/intel/isl/isl.h |

[Mesa-dev] [PATCH 2/3] i965: Use ISL for emitting null surface states.

We handle the Sandybridge multisampled 2D surface hack here, rather than in ISL, because it requires allocating a BO, and is kind of messy. --- src/mesa/drivers/dri/i965/Makefile.sources| 2 - src/mesa/drivers/dri/i965/brw_context.c | 4 +-

Re: [Mesa-dev] [PATCH] glsl: set old ldexp operand to NULL when lowering

Reviewed-by: Brian Paul Tested-by: Brian Paul Thanks! On 08/17/2017 05:43 PM, Timothy Arceri wrote: This fixes an assert during IR validation in LLVMpipe. Fixes: e2e2c5abd279 (glsl: calculate number of operands in an expression once) Bugzilla:

[Mesa-dev] [PATCH] winsys/svga/drm: Include sys/types.h

vmw_screen.h uses dev_t which is defines in sys/types.h this header is required to be included for getting dev_t definition. This issue happens on musl C library, it is hidden on glibc since sys/types.h is included through another system headers Signed-off-by: Khem Raj ---

Re: [Mesa-dev] [PATCH 1/9] ralloc: Allow reparenting to a NULL context

On August 17, 2017 4:54:42 PM Timothy Arceri wrote: On 18/08/17 09:05, Kenneth Graunke wrote: On Thursday, August 17, 2017 10:22:15 AM PDT Jason Ekstrand wrote: --- src/util/ralloc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [Mesa-dev] [PATCH 1/3] isl: Add a null surface fill function.

On August 17, 2017 4:36:42 PM Kenneth Graunke wrote: ISL already offers functions to fill out most kinds of SURFACE_STATE, so why not handle null surfaces too? Null surfaces are simple, so we can just take the dimensions, rather than an entirte fill structure. ---

Re: [Mesa-dev] [PATCH] mesa: count uniform against storage when its bindless

On 18/08/17 11:00, Kenneth Graunke wrote: On Thursday, August 17, 2017 4:41:52 PM PDT Timothy Arceri wrote: On 18/08/17 08:30, Kenneth Graunke wrote: On Tuesday, August 15, 2017 3:42:29 AM PDT Timothy Arceri wrote: Gallium drivers use this code path so we need to account for bindless after

[Mesa-dev] [Bug 102274] assertion failure in ir_validate.cpp:240

https://bugs.freedesktop.org/show_bug.cgi?id=102274 Timothy Arceri changed: What|Removed |Added Status|NEW |RESOLVED

Re: [Mesa-dev] [PATCH 1/9] ralloc: Allow reparenting to a NULL context

On Thursday, August 17, 2017 4:54:05 PM PDT Timothy Arceri wrote: > > On 18/08/17 09:05, Kenneth Graunke wrote: > > On Thursday, August 17, 2017 10:22:15 AM PDT Jason Ekstrand wrote: > >> --- > >> src/util/ralloc.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git

Re: [Mesa-dev] [PATCH 1/9] ralloc: Allow reparenting to a NULL context

On Thu, Aug 17, 2017 at 5:49 PM, Kenneth Graunke wrote: > On Thursday, August 17, 2017 4:54:05 PM PDT Timothy Arceri wrote: > > > > On 18/08/17 09:05, Kenneth Graunke wrote: > > > On Thursday, August 17, 2017 10:22:15 AM PDT Jason Ekstrand wrote: > > >> --- > > >>

Re: [Mesa-dev] [PATCH V2] i965: enable STD430 packing by default on IVB+

On August 17, 2017 7:04:20 PM Timothy Arceri wrote: v2: Add full description of the SNB issue to the TODO. --- src/mesa/drivers/dri/i965/brw_context.c | 12 1 file changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.c

Re: [Mesa-dev] [PATCH] glsl: set old ldexp operand to NULL when lowering

Am Freitag, den 18.08.2017, 09:43 +1000 schrieb Timothy Arceri: > This fixes an assert during IR validation in LLVMpipe. > > Fixes: e2e2c5abd279 (glsl: calculate number of operands in an > expression once) > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102274 > Cc: Brian Paul

Re: [Mesa-dev] [PATCH] i965/miptree: Return NONE from texture_aux_usage when fully resolved

On Thursday, August 17, 2017 6:07:18 PM PDT Jason Ekstrand wrote: > This little optimization improves the performance of SynMark v7 > TexFilterTri by almost 10% on Sky Lake GT4 among other improvements. > We've been doing it for some time but somehow it got dropped during > the miptree

Re: [Mesa-dev] [PATCH] radeon/ac: use ds_swizzle for derivs on si/cik.

On Thu, Aug 17, 2017 at 2:46 PM, Andres Gomez wrote: > Hi Dave, > > this patch has been collected for 17.2.0-rc3 but, for 17.1.x, the > conflicts are not so trivial and the landed commit was tagged for > stable without specifying the actual branch. > > Therefore, unless you

Re: [Mesa-dev] [PATCH 02/45] glsl: Add 16-bit types

On Thu, Aug 17, 2017 at 1:35 AM, Eduardo Lima Mitev wrote: > On 08/15/2017 10:56 PM, Jason Ekstrand wrote: > > > > On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro > > wrote: > > > > From: Eduardo Lima Mitev

Re: [Mesa-dev] [PATCH 04/11] i965: enable STD430 packing by default on IVB+

On Thu, Aug 17, 2017 at 4:03 AM, Timothy Arceri wrote: > --- > src/mesa/drivers/dri/i965/brw_context.c | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_context.c > b/src/mesa/drivers/dri/i965/brw_context.c > index

Re: [Mesa-dev] [PATCH 17/20] radeon/uvd: add YUYV format support for target buffer

On 08/17/2017 06:35 AM, Christian König wrote: Am 17.08.2017 um 12:27 schrieb Leo Liu: On 08/17/2017 05:15 AM, Christian König wrote: Am 16.08.2017 um 19:53 schrieb Leo Liu: YUYV is a packed YUV format, and there is no chorma plane v2: add stream type check for YUYV pitch setup

Re: [Mesa-dev] [PATCH shader-db 1/1] shaders: Add Dolphin’s übershaders

On Thu, Aug 17, 2017 at 02:04:25PM +0100, Emil Velikov wrote: > Hi Emmanuel, Hi Emil, > > On 5 August 2017 at 04:35, Emmanuel Gil Peyrot wrote: > > These shaders have been generated by Dolphin 9649494f67 on Mesa > > 8c26b52349 for an HD4000 GPU. > > > > They include a

Re: [Mesa-dev] How to write using EGLImage?

Hi Julien, On 15 August 2017 at 12:39, Julien Isorce wrote: > Also eglExportDMABUFImageMESA is still tagged 'MESA' > (EGL_MESA_image_dma_buf_export). Compared to EGL_EXT_image_dma_buf_import . The extensions are completely different and the MESA (vendor) tag is since

[Mesa-dev] [PATCH 3/6] vc4: Add support for 5551 textures.

This keeps us from promoting them up to , at the cost of not being color-renderable. --- src/gallium/drivers/vc4/vc4_formats.c | 5 ++--- src/gallium/drivers/vc4/vc4_uniforms.c | 1 + 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/vc4/vc4_formats.c

Re: [Mesa-dev] [PATCH shader-db 1/1] shaders: Add Dolphin’s übershaders

On 17 August 2017 at 16:23, Emmanuel Gil Peyrot wrote: > On Thu, Aug 17, 2017 at 02:04:25PM +0100, Emil Velikov wrote: >> Hi Emmanuel, > > Hi Emil, > >> >> On 5 August 2017 at 04:35, Emmanuel Gil Peyrot >> wrote: >> > These shaders have been

Re: [Mesa-dev] [PATCH 0/3] mesa: Modify drirc options

Hi Quentin, Glad you got your email configuration sorted out, and those are some nice changes! There are some changes that should be done before this can go to upstream. The Mesa policy is that your Git name has to be your real name, and AFAIU QuRyu is more of a screen name. After you

Re: [Mesa-dev] [PATCH 3/3] mesa: Fix backward compatbility for XML parser

On 17.08.2017 04:20, QuRyu wrote: After changing the type of drirc values, the parser will be unable to recognize xml files before the change. To achieve backward compatbility, Spelling: compatibility The commit message is good, though I would say "... will be unable to recognize xml files

Re: [Mesa-dev] [PATCH 2/6] gallium: Add support for 5551 with the 1-bit field in the low bit.

On 17 August 2017 at 17:10, Eric Anholt wrote: > This is how VC4 stores 5551 textures, which we need to support for > GL_OES_required_internalformat. > > v2: Extend commit message, fix svga driver build, add BE ordering from > Roland. > --- >

[Mesa-dev] [PATCH 1/6] mesa: Add X1B5G5R5 along with A1B5G5R5.

For supporting RGB5 in hardware with A in the low bit (vc4), we need this format as well. --- src/mesa/main/formats.c | 2 ++ src/mesa/main/formats.csv| 1 + src/mesa/main/formats.h | 1 + src/mesa/main/texformat.c| 1 + src/mesa/swrast/s_texfetch.c | 1 + 5 files changed, 6

[Mesa-dev] [PATCH 5/6] mesa: Expose GL_OES_required_internalformat on GLES contexts.

This extension is effectively a backport of GLES3's internalformat handling to GLES 1/2. It guarantees that sized internalformats specified for textures and renderbuffers have at least the specified size stored. That's a pretty minimal requirement, so I think it can be dummy_true and exposed as a

[Mesa-dev] [PATCH 4/6] mesa: Only expose GLES's EXT_texture_type_2_10_10_10_REV if supported in HW.

Previously, we were downconverting to automatically if the hardware didn't suport it. However, with the advent of GL_OES_required_internalformat, we have to actually store the internalformats we advertise support for. And, it seems rather disingenuous to advertise the extension if we don't

[Mesa-dev] [PATCH 6/6] mesa: Set new renderbuffers to RGBA4 on all GLES contexts.

Before we were doing RGBA4 on GLES3 only, but as of GLES2 2.0.22 it should be RGBA4 as well. Fixes DEQP functional.state_query.rbo.renderbuffer_internal_format. Tested-by: Matt Turner --- src/mesa/main/renderbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Mesa-dev] [PATCH 2/6] gallium: Add support for 5551 with the 1-bit field in the low bit.

This is how VC4 stores 5551 textures, which we need to support for GL_OES_required_internalformat. v2: Extend commit message, fix svga driver build, add BE ordering from Roland. --- src/gallium/auxiliary/util/u_format.csv | 2 ++ src/gallium/drivers/svga/svga_format.c | 2 ++

Re: [Mesa-dev] [PATCH v2 1/1] clover: Wait for requested operation if blocking flag is set

Jan Vesely writes: > On Tue, 2017-08-15 at 12:00 -0700, Francisco Jerez wrote: >> Jan Vesely writes: >> >> > On Sat, 2017-08-12 at 20:14 -0700, Francisco Jerez wrote: >> > > Jan Vesely writes: >> > > >> > > > On Sat,

[Mesa-dev] [Bug 102274] assertion failure in ir_validate.cpp:240

https://bugs.freedesktop.org/show_bug.cgi?id=102274 Michel Dänzer changed: What|Removed |Added CC|

Re: [Mesa-dev] [PATCH] mesa: count uniform against storage when its bindless

On Thursday, August 17, 2017 4:41:52 PM PDT Timothy Arceri wrote: > On 18/08/17 08:30, Kenneth Graunke wrote: > > On Tuesday, August 15, 2017 3:42:29 AM PDT Timothy Arceri wrote: > >> Gallium drivers use this code path so we need to account for > >> bindless after all. > > > > Why do Gallium

Re: [Mesa-dev] [PATCH 04/11] i965: enable STD430 packing by default on IVB+

On Thu, Aug 17, 2017 at 4:45 PM, Timothy Arceri wrote: > > > On 18/08/17 00:33, Jason Ekstrand wrote: > >> On Thu, Aug 17, 2017 at 4:03 AM, Timothy Arceri > > wrote: >> >> --- >>

[Mesa-dev] [PATCH V2 0/2] mesa: Modify drirc options

From: Quentin Liu This serie of patches changes drirc's semanticaclly boolean options, options that are enum type options but which in essence are boolean options e.g. pp_shalde, into actual boolean optioinns. Backwawrd compatbility is maintained by relaxinig

[Mesa-dev] [PATCH V2 1/2] mesa: Fix backward compatibility for XML parser

From: Quentin Liu If the type of drirc options are changed, the parser will not be able to recognize xml files that had been present before the change. To achieve backward compatibility, the parser is relaxed to recognize boolean type options with enum values. ---

[Mesa-dev] [PATCH V2 2/2] mesa: Modify drirc option types

From: Quentin Liu The type and default values of certain drirc options are changed, namely, those semantically boolean options such as pp_celshade. --- src/gallium/auxiliary/pipe-loader/driinfo_gallium.h | 8 src/util/xmlpool/t_options.h

[Mesa-dev] [PATCH] i965/miptree: Return NONE from texture_aux_usage when fully resolved

This little optimization improves the performance of SynMark v7 TexFilterTri by almost 10% on Sky Lake GT4 among other improvements. We've been doing it for some time but somehow it got dropped during the miptree refactoring. Bugzilla: https://bugs.freedesktop.org/102258 Cc: "17.2"

[Mesa-dev] [PATCH] android: fix gallium_dri.so can't be loaded by drm_gralloc

The problem is in gallium/winsys/amdgpu/drm/Android.mk which will have duplacated symbols when linking gallium_dri.so for libLLVMCore and libLLVM. Signed-off-by: Qiang Yu Signed-off-by: Mauro Rossi Signed-off-by: Rob Herring ---

[Mesa-dev] [PATCH V2] i965: enable STD430 packing by default on IVB+

v2: Add full description of the SNB issue to the TODO. --- src/mesa/drivers/dri/i965/brw_context.c | 12 1 file changed, 12 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index d97a24fbf8..11cb2f7226 100644 ---

[Mesa-dev] [Bug 102274] assertion failure in ir_validate.cpp:240

https://bugs.freedesktop.org/show_bug.cgi?id=102274 Bug ID: 102274 Summary: assertion failure in ir_validate.cpp:240 Product: Mesa Version: git Hardware: Other OS: All Status: NEW Severity: major

Re: [Mesa-dev] [PATCH 06/45] nir: Handle fp16 rounding modes at nir_type_conversion_op

On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro wrote: > From: Jose Maria Casanova Crespo > > nir_type_conversion enables new operations to handle rounding modes to > convert to fp16 values. Two new opcodes are enabled nir_op_f2f16_rtne > and

Re: [Mesa-dev] [PATCH 08/45] spirv/nir: Add support for SPV_KHR_16bit_storage

This should come after 10 On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro wrote: > From: Eduardo Lima Mitev > > --- > src/compiler/spirv/nir_spirv.h| 1 + > src/compiler/spirv/spirv_to_nir.c | 7 +++ > 2 files changed, 8 insertions(+) > >

Re: [Mesa-dev] [PATCH v2 1/1] clover: Wait for requested operation if blocking flag is set

On Tue, 2017-08-15 at 12:00 -0700, Francisco Jerez wrote: > Jan Vesely writes: > > > On Sat, 2017-08-12 at 20:14 -0700, Francisco Jerez wrote: > > > Jan Vesely writes: > > > > > > > On Sat, 2017-08-05 at 12:34 -0700, Francisco Jerez wrote: > > >

Re: [Mesa-dev] [PATCH 09/45] spirv/nir: Handle 16-bit types

On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro wrote: > From: Eduardo Lima Mitev > > Signed-off-by: Jose Maria Casanova Crespo > Signed-off-by: Eduardo Lima > --- > src/compiler/spirv/spirv_to_nir.c | 30

Re: [Mesa-dev] [PATCH 10/45] spirv: Enable FPRoundingMode decorator to nir operations

On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro wrote: > From: Jose Maria Casanova Crespo > > SpvOpFConvert now manages the FPRoundingMode decorator for the > returning values enabling the nir_rounding_mode in the conversion > operation to fp16

Re: [Mesa-dev] [PATCH 11/45] i965/vec4: Handle 16-bit types at type_size_xvec4

On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro wrote: > These types have similar vec4 sizes as their 32-bit counterparts. > --- > src/intel/compiler/brw_vec4_visitor.cpp | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/src/intel/compiler/brw_vec4_visitor.cpp

Re: [Mesa-dev] [PATCH 13/45] i965/fs: Handle 16-bit base types in helper functions

On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro wrote: > From: Eduardo Lima Mitev > > --- > src/intel/compiler/brw_fs.cpp | 3 +++ > src/intel/compiler/brw_shader.cpp | 6 ++ > 2 files changed, 9 insertions(+) > > diff --git

Re: [Mesa-dev] [Mesa-stable] [PATCH 3/3] swr: use the correct variable for no undefined symbols

On 17 August 2017 at 01:44, Andres Gomez wrote: > Emil, this patch breaks SWR build in 17.1, although it states that > fixes 9475251145174882b532. > Indeed it does. There's a missing libglapi link which got reworked/dropped with f50aa21456d82c8cb6fbaa565835f1acc1720a5d >

[Mesa-dev] [PATCH 9/9] spirv: Replace unreachable with vtn_fail

--- src/compiler/spirv/spirv_to_nir.c | 136 +++-- src/compiler/spirv/vtn_alu.c | 20 +++--- src/compiler/spirv/vtn_cfg.c | 8 +-- src/compiler/spirv/vtn_glsl450.c | 14 ++-- src/compiler/spirv/vtn_private.h | 3 +-

[Mesa-dev] [PATCH 7/9] spirv: Add vtn_fail and vtn_assert helpers

These helpers are much nicer than just using assert because they don't kill your process. Instead, it longjmps back to spirv_to_nir(), cleans up all the temporary memory, and nicely returns NULL. While crashing is completely OK in the Vulkan world, it's not considered to be quite so nice in GL.

[Mesa-dev] [PATCH 8/9] spirv: Replace assert with vtn_assert

--- src/compiler/spirv/spirv_to_nir.c | 200 +- src/compiler/spirv/vtn_alu.c | 26 ++--- src/compiler/spirv/vtn_cfg.c | 51 - src/compiler/spirv/vtn_glsl450.c | 4 +- src/compiler/spirv/vtn_variables.c | 212

[Mesa-dev] [PATCH 4/9] spirv: Rework logging

This commit reworks the way that logging works in SPIR-V to provide richer and more detailed logging infrastructure. This commit contains several improvements over the old mechanism: 1) Log messages are now more detailed. They contain the SPIR-V byte offset as well as source language

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