On Sun, 2021-07-25 at 23:27 +0200, Philippe Mathieu-Daudé wrote:
> +Cédric/Benjamin
>
> On 7/25/21 2:24 PM, Richard Henderson wrote:
> > From clang-13:
> > hw/pci-host/pnv_phb4.c:375:18: error: variable 'v' set but not used
> > \
> > [-Werror,-Wunused-but-set-variable]
> >
> > It's pretty
On Fri, Jul 23, 2021 at 02:56:26PM -0300, Lucas Mateus Castro (alqotel) wrote:
> ppc_store_sdr1 was at first in mmu_helper.c and was moved as part
> the patches to enable the disable-tcg option, now it's being moved
> back to a file that will be compiled with that option
>
> Signed-off-by: Lucas
On Fri, Jul 23, 2021 at 02:56:25PM -0300, Lucas Mateus Castro (alqotel) wrote:
> Divided mmu_helper.c in 2 files, functions inside #ifdef CONFIG_SOFTMMU
> stayed in mmu_helper.c, other functions moved to mmu_common.c. Updated
> meson.build to compile mmu_common.c and only compile mmu_helper.c when
On Fri, Jul 23, 2021 at 02:56:27PM -0300, Lucas Mateus Castro (alqotel) wrote:
> moved store_40x_sler from mmu_common.c to helper_regs.c as it is
> a function to store a value in a special purpose register, so
> moving it to a file focused in special register manipulation
> is more appropriate.
>
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/721825
Title:
VDI block
> -Original Message-
> From: Richard Henderson
> Sent: Sunday, July 25, 2021 8:08 AM
> To: Taylor Simpson ; qemu-devel@nongnu.org
> Cc: phi...@redhat.com; a...@rev.ng; Brian Cain ;
> peter.mayd...@linaro.org
> Subject: Re: [PATCH 02/20] Hexagon HVX (target/hexagon) add Hexagon
> Vector
> -Original Message-
> From: Richard Henderson
> Sent: Sunday, July 25, 2021 8:22 AM
> To: Taylor Simpson ; qemu-devel@nongnu.org
> Cc: phi...@redhat.com; a...@rev.ng; Brian Cain ;
> peter.mayd...@linaro.org
> Subject: Re: [PATCH 12/20] Hexagon HVX (target/hexagon) helper functions
>
>
On Thu, Jul 22, 2021 at 11:13:40AM -0300, Fabiano Rosas wrote:
> PowerPC has two KVM types (HV, PR) that translate into three kernel
> modules:
>
> kvm.ko - common kvm code
> kvm_hv.ko - kvm running with MSR_HV=1 or MSR_HV|PR=0 in a nested guest.
> kvm_pr.ko - kvm running in usermode MSR_PR=1.
>
On 7/25/21 3:14 PM, Michael S. Tsirkin wrote:
On Sat, Jul 24, 2021 at 11:52:34AM -0700, Guenter Roeck wrote:
Hi all,
starting with qemu v6.0, some of my aarch64 efi boot tests no longer
work. Analysis shows that PCI devices with IO ports do not instantiate
in qemu v6.0 (or v6.1-rc0) when
On Sat, Jul 24, 2021 at 11:52:34AM -0700, Guenter Roeck wrote:
> Hi all,
>
> starting with qemu v6.0, some of my aarch64 efi boot tests no longer
> work. Analysis shows that PCI devices with IO ports do not instantiate
> in qemu v6.0 (or v6.1-rc0) when booting through efi. The problem affects
>
From: Peter Maydell
The qemu.h file is a CONFIG_USER_ONLY header; it doesn't appear on
the include path for softmmu builds. Currently we include it
unconditionally in target/hexagon/op_helper.c. We used to need it
for the put_user_*() and get_user_*() functions, but now that we have
removed
Replace put_user_* with cpu_st*_data_ra
Replace get_user_* with cpu_ld*_data_ra
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Taylor Simpson
Message-Id: <1626384156-6248-2-git-send-email-tsimp...@quicinc.com>
---
target/hexagon/op_helper.c | 39
-20210725
for you to fetch changes up to 25fc9b79cd057e394f35d7afc18493becd515797:
target/hexagon: Drop include of qemu.h (2021-07-21 15:54:02 -0500)
The Hexagon target was silently failing the SIGSEGV test because
the signal handler
+Cédric/Benjamin
On 7/25/21 2:24 PM, Richard Henderson wrote:
> From clang-13:
> hw/pci-host/pnv_phb4.c:375:18: error: variable 'v' set but not used \
> [-Werror,-Wunused-but-set-variable]
>
> It's pretty clear that we meant to write back 'v' after
> all that computation and not 'val'.
>
On 7/25/21 1:05 PM, Mark Cave-Ayland wrote:
> Commit db1ffc32dd ("qemu/bitops.h: add bitrev8 implementation") introduced a
> bitrev8() function to reverse the bit ordering required for storing the MAC
> address in the q800 PROM.
>
> This function is not required since QEMU implements its own
On 7/23/21 6:21 AM, Peter Maydell wrote:
In Arm v8.1M the VECTPENDING field in the ICSR has new behaviour: if
the register is accessed NonSecure and the highest priority pending
enabled exception (that would be returned in the VECTPENDING field)
targets Secure, then the VECTPENDING field must
On 7/23/21 6:21 AM, Peter Maydell wrote:
The VECTPENDING field in the ICSR is 9 bits wide, in bits [20:12] of
the register. We were incorrectly masking it to 8 bits, so it would
report the wrong value if the pending exception was greater than 256.
Fix the bug.
Signed-off-by: Peter Maydell
---
On 7/23/21 6:21 AM, Peter Maydell wrote:
The ISCR.ISRPENDING bit is set when an external interrupt is pending.
This is true whether that external interrupt is enabled or not.
This means that we can't use 's->vectpending == 0' as a shortcut to
"ISRPENDING is zero", because s->vectpending
On 7/23/21 6:21 AM, Peter Maydell wrote:
For M-profile, we weren't reporting alignment faults triggered by the
generic TCG code correctly to the guest. These get passed into
arm_v7m_cpu_do_interrupt() as an EXCP_DATA_ABORT with an A-profile
style exception.fsr value of 1. We didn't check for
On 7/23/21 6:21 AM, Peter Maydell wrote:
In do_v7m_exception_exit(), we perform various checks as part of
performing the exception return. If one of these checks fails, the
architecture requires that we take an appropriate exception on the
existing stackframe. We implement this by calling
On 7/23/21 6:21 AM, Peter Maydell wrote:
For M-profile, unlike A-profile, the low 2 bits of SP are defined to be
RES0H, which is to say that they must be hardwired to zero so that
guest attempts to write non-zero values to them are ignored.
Implement this behaviour by masking out the low bits:
On 7/25/21 7:44 AM, Peter Maydell wrote:
This patchset fixes the intermittent hang seen when running a guest in
icount mode, as reported in
https://gitlab.com/qemu-project/qemu/-/issues/499 .
The underlying cause of the hang is that code in cpu_loop_exec_tb()
was using CF_COUNT_MASK as the
In cpu_loop_exec_tb(), we decide whether to look for a TB with
exactly insns_left instructions in it using the condition
(!cpu->icount_extra && insns_left > 0 && insns_left < tb->icount)
The check for icount_extra == 0 is unnecessary, because we just set
insns_left = MIN(0x,
On Sun, 25 Jul 2021 at 18:44, Peter Maydell wrote:
>
> In cpu_loop_exec_tb(), we decide whether to look for a TB with
> exactly insns_left instructions in it using the condition
> (!cpu->icount_extra && insns_left > 0 && insns_left < tb->icount)
>
> The check for icount_extra == 0 is
This patchset fixes the intermittent hang seen when running a guest in
icount mode, as reported in
https://gitlab.com/qemu-project/qemu/-/issues/499 .
The underlying cause of the hang is that code in cpu_loop_exec_tb()
was using CF_COUNT_MASK as the maximum possible number of instructions
it
In cpu_loop_exec_tb() we were bounding the number of insns we might
try to execute in a TB using CF_COUNT_MASK. This is incorrect,
because we can validly put up to 0x into icount_decr.u16.low. In
particular, since commit 78ff82bb1b67c0d7 reduced CF_COUNT_MASK to
511 this meant that we would
Since commit 8eb13bbbac ("ui/gtk: vte: fix sending multiple
characeters") it's very easy to lock up QEMU with the GTK ui.
If you configure a guest with a serial device and the guest
doesn't listen on this device, QEMU will lock up after
entering two characters in the serial console. That's because
Since commit 8eb13bbbac ("ui/gtk: vte: fix sending multiple
characeters") it's very easy to lock up QEMU with the GTK ui.
If you configure a guest with a serial device and the guest
doesn't listen on this device, QEMU will lock up after
entering two characters in the serial console.
v2:
Gerd
On Sat, 24 Jul 2021 at 21:48, Richard Henderson
wrote:
>
> On 7/24/21 10:27 AM, Peter Maydell wrote:
> > On Sat, 24 Jul 2021 at 14:49, Peter Maydell
> > wrote:
> >> There is a slight difficulty here with testing this: icount
> >> doesn't seem to work for sparc Linux guests in master at the
> >>
On 7/5/21 1:34 PM, Taylor Simpson wrote:
+put_user_u8(env->vstore[i].data.ub[j], va + j);
No put_user.
r~
On 7/5/21 1:34 PM, Taylor Simpson wrote:
Functions to support scatter/gather
...
+uint32_t count_leading_ones_2(uint16_t src)
+{
+int ret;
+for (ret = 0; src & 0x8000; src <<= 1) {
+ret++;
+}
+return ret;
+}
Not related to scatter/gather.
Also, much better
On 7/5/21 1:34 PM, Taylor Simpson wrote:
+char *name = (char *)opcode_names[opcode];
+if (strncmp(name, test, strlen(test)) == 0) {
Why did you cast away const here?
r~
On 7/5/21 1:34 PM, Taylor Simpson wrote:
+static inline MMVector mmvec_vtmp_data(CPUHexagonState *env)
+{
+VRegMask vsel = env->VRegs_updated_tmp;
+MMVector ret;
+int idx = clo32(~revbit32(vsel));
+if (vsel == 0) {
+printf("[UNDEFINED] no .tmp load when implicitly
On 7/5/21 1:34 PM, Taylor Simpson wrote:
Signed-off-by: Taylor Simpson
---
target/hexagon/hex_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h
index f291911..e1b3149 100644
--- a/target/hexagon/hex_regs.h
+++
On 7/5/21 1:34 PM, Taylor Simpson wrote:
HVX is a set of wide vector instructions. Machine state includes
vector registers (VRegs)
vector predicate registers (QRegs)
temporary registers for intermediate values
store buffer (masked stores and scatter/gather)
Signed-off-by:
>From clang-13:
hw/pci-host/pnv_phb4.c:375:18: error: variable 'v' set but not used \
[-Werror,-Wunused-but-set-variable]
It's pretty clear that we meant to write back 'v' after
all that computation and not 'val'.
Acked-by: David Gibson
Signed-off-by: Richard Henderson
---
>From clang-13:
tests/unit/test-iov.c:161:26: error: variable 't' set but not used \
[-Werror,-Wunused-but-set-variable]
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tests/unit/test-iov.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
>From clang-13:
linux-user/syscall.c:8503:17: error: variable 'total_size' set but not used \
[-Werror,-Wunused-but-set-variable]
Acked-by: Laurent Vivier
Signed-off-by: Richard Henderson
---
linux-user/syscall.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/linux-user/syscall.c
>From clang-13:
../qemu/net/checksum.c:189:23: error: variable 'buf_off' set but not used \
[-Werror,-Wunused-but-set-variable]
Signed-off-by: Richard Henderson
---
net/checksum.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/net/checksum.c b/net/checksum.c
index
>From clang-13:
hw/audio/adlib.c:189:18: error: variable 'net' set but not used \
[-Werror,-Wunused-but-set-variable]
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
hw/audio/adlib.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
>From clang-13:
hw/ppc/spapr_events.c:937:14: error: variable 'xinfo' set but not used \
[-Werror,-Wunused-but-set-variable]
Acked-by: David Gibson
Signed-off-by: Richard Henderson
---
hw/ppc/spapr_events.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/ppc/spapr_events.c
>From clang-13:
util/selfmap.c:26:21: error: variable 'errors' set but not used \
[-Werror,-Wunused-but-set-variable]
Quite right of course, but there's no reason not to check errors.
First, incrementing errors is incorrect, because qemu_strtoul
returns an errno not a count -- just or them
>From clang-13:
accel/tcg/cpu-exec.c:783:15: error: variable 'cc' set but not used \
[-Werror,-Wunused-but-set-variable]
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff
>From clang-13:
nbd/server.c:976:22: error: variable 'bitmaps' set but not used \
[-Werror,-Wunused-but-set-variable]
which is incorrect; see //bugs.llvm.org/show_bug.cgi?id=3888.
Cc: qemu-bl...@nongnu.org
Cc: Eric Blake
Cc: Vladimir Sementsov-Ogievskiy
Signed-off-by: Richard Henderson
These are all "variable set but not used" Werrors when building
with clang master.
Patch 1 is clearly a clang bug, not considering the side-effects
of g_autofree, but the rest are legitimate.
r~
Richard Henderson (9):
nbd/server: Mark variable unused in nbd_negotiate_meta_queries
On 7/25/21 1:05 AM, Mark Cave-Ayland wrote:
Commit db1ffc32dd ("qemu/bitops.h: add bitrev8 implementation") introduced a
bitrev8() function to reverse the bit ordering required for storing the MAC
address in the q800 PROM.
This function is not required since QEMU implements its own revbit8()
Commit db1ffc32dd ("qemu/bitops.h: add bitrev8 implementation") introduced a
bitrev8() function to reverse the bit ordering required for storing the MAC
address in the q800 PROM.
This function is not required since QEMU implements its own revbit8() function
which does exactly the same thing.
VMRUN exits with SVM_EXIT_ERR if either:
* The event injected has a reserved type.
* When the event injected is of type 3 (exception), and the vector that
has been specified does not correspond to an exception.
This does not fix the entire exc_inj test in kvm-unit-tests.
Signed-off-by: Lara
On 24/07/2021 14:49, Peter Maydell wrote:
The gen_io_end() function is obsolete (as documented in
docs/devel/tcg-icount.rst). Where an instruction is an I/O
operation, the translator frontend should call gen_io_start()
before generating the code which does the I/O, and then
end the TB
Hi Igor,
On Fri, Jul 23, 2021 at 12:04 PM Igor Mammedov wrote:
> Commit [1] switched PCI hotplug from native to ACPI one by default.
>
> That however breaks hotplug on following CLI that used to work:
>-nodefaults -machine q35 \
>-device
>
Hi Sebastian,
On 11:49 Fri 09 Jul , Sebastian Huber wrote:
> According to the GICv3 specification register GICD_ISPENDR0 is Banked for each
You're referring to GICv3 but actually modifying GICv2 model. Having a
look at GICv2 reference manual, your affirmation still hold though.
> connected
ping ...
On Wed, 21 Jul 2021, Ani Sinha wrote:
> All existing code using acpi_get_i386_pci_host() checks for a non-null
> return from this function call. This change brings the same check to
> acpi_pcihp_disable_root_bus() function. Also adds a comment describing
> why we unconditionally pass a
On Thu, Jul 22, 2021 at 07:00:56PM +0100, Dr. David Alan Gilbert wrote:
> * David Gibson (da...@gibson.dropbear.id.au) wrote:
> > On Tue, Jul 20, 2021 at 07:30:16AM +0200, Markus Armbruster wrote:
> > > "Dr. David Alan Gilbert" writes:
> > >
> > > > * Markus Armbruster (arm...@redhat.com) wrote:
53 matches
Mail list logo
