if they are inlined.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
Acked-by: Mika Westerberg mika.westerb...@iki.fi
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On Tue, Jul 02, 2013 at 10:07:01AM -0700, H Hartley Sweeten wrote:
Check t-bits_per_word directly and remove the inline helper function.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
I wonder why
On Tue, Jul 02, 2013 at 10:07:53AM -0700, H Hartley Sweeten wrote:
Get the platform resources early in the (*probe) to minimize the number
of goto's in the error path.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg
Westerberg mika.westerb...@iki.fi
Acked-by: Mika Westerberg mika.westerb...@iki.fi
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On Tue, Jul 02, 2013 at 10:08:59AM -0700, H Hartley Sweeten wrote:
The kzalloc() failure will have already output a message.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
Acked-by: Mika Westerberg
the t-bits_per_word directly to ep93xx_spi_chip_setup() in
ep93xx_spi_process_transfer() and remove 'dss' from the per chip private
data.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
Acked-by: Mika
Cc: Mika Westerberg mika.westerb...@iki.fi
Cc: Mark Brown broo...@kernel.org
Cc: Grant Likely grant.lik...@linaro.org
---
drivers/spi/spi-ep93xx.c | 88
++--
1 file changed, 48 insertions(+), 40 deletions(-)
diff --git a/drivers/spi/spi
On Fri, Jun 28, 2013 at 11:43:07AM -0700, H Hartley Sweeten wrote:
This driver supports 16 to 4 bits per work. Set the bits_per_word_mask
to allows the spi core to handle validation.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika
transfer.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
Cc: Mark Brown broo...@kernel.org
Cc: Grant Likely grant.lik...@linaro.org
---
drivers/spi/spi-ep93xx.c | 16 +---
1 file
the t-bits_per_word directly to ep93xx_spi_chip_setup() in
ep93xx_spi_process_transfer() and remove 'dss' from the per chip private
data.
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
Cc: Mark Brown
hswee...@visionengravers.com
Cc: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
Acked-by: Mika Westerberg mika.westerb...@iki.fi
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: Ryan Mallon rmal...@gmail.com
Cc: Mika Westerberg mika.westerb...@iki.fi
Acked-by: Mika Westerberg mika.westerb...@iki.fi
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: Mika Westerberg mika.westerb...@iki.fi
Acked-by: Mika Westerberg mika.westerb...@iki.fi
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this.
Acked-by: Mika Westerberg mika.westerb...@iki.fi
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___
spi-devel
are going to make a new version of the patch anyway, can you rename
'espi_irq' to just plain 'irq'?
After that you can add my
Acked-by: Mika Westerberg mika.westerb...@iki.fi
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For Developers, A Lot Can Happen In A Second
On Wed, Apr 18, 2012 at 11:09:18AM -0500, H Hartley Sweeten wrote:
But, I really don't think we actually gain anything by displaying the
memory and irq. Maybe this would be more useful:
dev_info(pdev-dev, EP93xx SPI Controller using %s\n,
espi-dma_tx ? DMA : PIO);
On Sun, Jun 05, 2011 at 01:18:14AM -0600, Grant Likely wrote:
[repost: I had a typo on the spi-devel-general mailing list address]
Sort the SPI makefile and enforce the naming convention spi_*.c for
spi drivers.
This change also rolls the contents of atmel_spi.h into the .c file
since
On Thu, May 26, 2011 at 09:15:25AM +0200, Linus Walleij wrote:
On Thu, May 26, 2011 at 6:33 AM, Mika Westerberg mika.westerb...@iki.fi
wrote:
Do you think that we can go forward with this patch series if I drop the
last
patch (spi/ep93xx: add DMA support)? This way we will have
On Wed, May 25, 2011 at 10:47:14PM +0200, Linus Walleij wrote:
IMHO it is better to have ep93xx implementation on its own driver since it
is
not a real AMBA PL022 peripheral but some weird hack made by Cirrus
(although
my opinions are bit biased).
I disagree because it's IMO at
On Thu, May 06, 2010 at 07:47:04AM +0300, Mika Westerberg wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller
found
in EP93xx chips.
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Acked-by: H
.
Regards,
MW
Mika Westerberg (2):
spi: implemented driver for Cirrus EP93xx SPI controller
ep93xx: SPI driver platform support code
Documentation/spi/ep93xx_spi| 95 +++
arch/arm/mach-ep93xx/clock.c| 13 +
arch/arm/mach-ep93xx/core.c
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips.
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
Acked-by: H Hartley Sweeten hswee...@visionengravers.com
Cc: Ryan Mallon r
This patch adds platform side support code for the EP93xx SPI driver. This
includes clock, resources and muxing. There is a new function:
ep93xx_register_spi()
which can be used by board support code to register new SPI devices for the
board.
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
On Mon, May 03, 2010 at 01:45:01PM -0500, H Hartley Sweeten wrote:
(...)
Overall this looks good.
For the modified chip select support, you have my:
Signed-off-by: H Hartley Sweeten hswee...@visionengravers.com
For the ep93xx driver in general, you have my:
Acked-by: H Hartley
On Wed, Apr 28, 2010 at 05:30:25PM -0500, H Hartley Sweeten wrote:
On Wednesday, April 28, 2010 10:51 AM, Mika Westerberg wrote:
Hello,
This series implements SPI master driver for Cirrus Logic EP93xx SPI
controllers.
This is fifth iteration of the driver.
Changes
hacked the
board a bit to get EGPIO9 as a chip select).
Note that patch 2/2 depends on patch that is already in Russell's patch
tracking system:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5998/1
Thanks,
MW
Mika Westerberg (2):
spi: implemented driver for Cirrus
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
---
Documentation/spi/ep93xx_spi | 102 +++
arch/arm/mach-ep93xx/include/mach
Hi,
I just answer to this last message as it seems that continuous
transfer is really not a 100% solid solution; It makes things more
complicated than need to be and benefit for that is probably not
worth the additional complexity. Feel free to disagree :)
On Sun, Apr 25, 2010 at 03:25:16PM
On Sun, Apr 25, 2010 at 03:25:16PM -0500, H Hartley Sweeten wrote:
With a slow enough clock you can probably get to a point where SFRMOUT
will stay deasserted during the entire 512 byte transfer. But it would
still de-assert during the switch to the next transfer in the message.
Regardless,
On Sun, Apr 25, 2010 at 02:55:08PM -0500, H Hartley Sweeten wrote:
On Saturday, April 24, 2010 11:15 AM, Martin Guy wrote:
static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
{
...
if (!(irq_status (SSPIIR_RORIS | SSPIIR_TIS | SSPIIR_RIS)))
return
On Wed, Apr 21, 2010 at 01:00:56PM -0500, H Hartley Sweeten wrote:
Same results are your v4 driver. But, I think your on the right track.
I think the problem is in the ep93xx_spi_read_write routine. That function
returns 0 as long as there is still data left in the current transfer. The
On Thu, Apr 22, 2010 at 03:43:24PM -0500, H Hartley Sweeten wrote:
On Thursday, April 22, 2010 10:55 AM, Mika Westerberg wrote:
Could you test this in your setup?
Same results.
OK. thanks for testing.
I hacked your driver to allow me to toggle a gpio when the interrupt routine
starts
On Tue, Apr 20, 2010 at 05:16:10PM -0500, H Hartley Sweeten wrote:
On Tuesday, April 20, 2010 8:12 AM, Mika Westerberg wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller
found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Signed-off
On Tue, Apr 20, 2010 at 08:52:26PM -0500, H Hartley Sweeten wrote:
On Tuesday, April 20, 2010 6:10 PM, Martin Guy wrote:
I have noticed on card insertion, the last line of:
mmc0: problem reading switch capabilities, performance might suffer.
mmc0: host does not support reading read-only
On Tue, Apr 20, 2010 at 12:24:26PM -0500, H Hartley Sweeten wrote:
On Tuesday, April 20, 2010 8:12 AM, Mika Westerberg wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller
found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Signed-off
On Tue, Apr 20, 2010 at 08:52:26PM -0500, H Hartley Sweeten wrote:
On Tuesday, April 20, 2010 6:10 PM, Martin Guy wrote:
Not easily, but it seems a likely cause.
To prevent card deselection mid-message I think we would need to
handle multi-transfer messages by making the start of transfers
On Wed, Apr 21, 2010 at 11:47:13AM -0500, H Hartley Sweeten wrote:
On Wednesday, April 21, 2010 12:16 AM, Mika Westerberg wrote:
I think it is more readable to do:
ep93xx_spi_select_device(espi, msg-spi);
and
ep93xx_spi_deselect_device(espi, msg-spi);
It can be seen from
On Wed, Apr 21, 2010 at 01:00:56PM -0500, H Hartley Sweeten wrote:
Same results are your v4 driver. But, I think your on the right track.
Thanks for testing.
I think the problem is in the ep93xx_spi_read_write routine. That function
returns 0 as long as there is still data left in the
On Wed, Apr 21, 2010 at 09:47:14PM -0500, H Hartley Sweeten wrote:
[...]
First, every spi transaction, including a single byte transfer, is
going to generate at least two interrupts. One when the interrupts
are first enabled because the TX FIFO is empty. And a second when
that byte has been
that is already in Russell's patch
tracking system:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5998/1
Thanks,
MW
Mika Westerberg (2):
spi: implemented driver for Cirrus EP93xx SPI controller
ep93xx: SPI driver platform support code
arch/arm/mach-ep93xx/clock.c
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
---
arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h | 32 +
drivers/spi/Kconfig
ep93xx: added chip revision reading function
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
---
arch/arm/mach-ep93xx/clock.c| 14 +++
arch/arm/mach-ep93xx/core.c | 48 +++
arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
On Fri, Apr 16, 2010 at 01:28:05PM -0500, H Hartley Sweeten wrote:
I finally was able to get this working on my system. Not sure what the issue
was earlier.
Great :)
The only thing I don't like right off hand is the chip select handling.
The way it currently is done you are limited to
system:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5998/1
Thanks,
MW
Mika Westerberg (2):
spi: implemented driver for Cirrus EP93xx SPI controller
ep93xx: SPI driver platform support code
arch/arm/mach-ep93xx/clock.c| 14 +
arch/arm/mach
ep93xx: added chip revision reading function
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
---
arch/arm/mach-ep93xx/clock.c| 14 +++
arch/arm/mach-ep93xx/core.c | 42 +++
arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver supports polling and interrupt based transfer methods. This can be
selected with module parameter 'transfer_method'.
Signed-off-by: Mika Westerberg
On Fri, Apr 09, 2010 at 06:56:49PM +0100, Martin Guy wrote:
you end up with:
while (espi-tx t-len) {
ep93xx_do_write(espi, t);
while (ep93xx_spi_read_u8(espi, SSPSR) SSPSR_BSY);
ep93xx_do_read(espi, t);
}
This makes
On Tue, Apr 06, 2010 at 01:50:44PM +0100, Martin Guy wrote:
On 4/6/10, Mika Westerberg mika.westerb...@iki.fi wrote:
On Thu, Apr 01, 2010 at 01:15:20AM +0100, Martin Guy wrote:
I have another question: like the Cirrus driver, this takes 100% CPU
doing busy wait for the current transfer
On Thu, Apr 01, 2010 at 01:15:20AM +0100, Martin Guy wrote:
On 3/25/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI
controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver
On Thu, Apr 01, 2010 at 01:15:20AM +0100, Martin Guy wrote:
On 3/25/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI
controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver
On Thu, Mar 18, 2010 at 12:27:15PM -0500, H Hartley Sweeten wrote:
On Thursday, March 18, 2010 10:00 AM, Mika Westerberg wrote:
Added a new function: ep93xx_chip_revision() which reads chip revision from
the
sysconfig register.
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
On Thu, Mar 25, 2010 at 01:49:32PM +, Martin Guy wrote:
On 3/18/10, Mika Westerberg mika.westerb...@iki.fi wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller
found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports
Hello,
This is second, updated revision of the series. I tried to address all the
review comments given by H Hartley Sweeten, Ryan Mallon and Martin Guy.
I also tested these again with my TS-7260 board (it has EP9302 chip) using at25
and mmc_spi drivers.
Please review.
Thanks,
MW
Mika
Added a new function: ep93xx_chip_revision() which reads chip revision from the
sysconfig register.
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
---
arch/arm/mach-ep93xx/core.c | 14 ++
arch/arm/mach-ep93xx/include/mach/platform.h |8
2 files
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports only interrupt driven mode but in future we may add
polling mode support as well.
Signed-off-by: Mika Westerberg mika.westerb
On Mon, Mar 15, 2010 at 01:22:51PM -0500, H Hartley Sweeten wrote:
On Monday, March 15, 2010 9:26 AM, Mika Westerberg wrote:
Hello,
This series provides SPI master controller driver implementation for
Cirrus Logic EP93xx controllers.
I've tested this on my TS-7260 board with SPI
On Mon, Mar 15, 2010 at 07:44:27PM +, Martin Guy wrote:
Hi Mika, thanks, great work
On 3/15/10, Mika Westerberg mika.westerb...@iki.fi wrote:
Added a new function: ep93xx_chip_revision() which reads chip revision from
the
sysconfig register.
+ * %EP93XX_CHIP_REV_D0
On Tue, Mar 16, 2010 at 09:32:05AM +1300, Ryan Mallon wrote:
Mika Westerberg wrote:
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller
found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports only interrupt driven mode
Added a new function: ep93xx_chip_revision() which reads chip revision from the
sysconfig register.
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
---
arch/arm/mach-ep93xx/core.c | 26 ++
arch/arm/mach-ep93xx/include/mach/platform.h | 11
if someone wants to try this, it would be great
(see [1] for example code that I used with MMC cards).
This series applies on top of Linus' 2.6.34-rc1.
Please review.
Thanks,
MW
Mika Westerberg (3):
spi: implemented driver for Cirrus EP93xx SPI controller
ep93xx: added chip revision reading
ep93xx_chip_revision().
Signed-off-by: Mika Westerberg mika.westerb...@iki.fi
---
arch/arm/mach-ep93xx/clock.c| 21 +++
arch/arm/mach-ep93xx/core.c | 42 +++
arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h |1 +
arch/arm/mach
This patch adds an SPI master driver for the Cirrus EP93xx SPI controller found
in EP93xx chips (EP9301, EP9302, EP9307, EP9312 and EP9315).
Driver currently supports only interrupt driven mode but in future we may add
polling mode support as well.
Signed-off-by: Mika Westerberg mika.westerb
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