C-field in the CSAC?
On Fri, Apr 11, 2014 at 3:19 PM, Gerald Chafee gcha...@gmail.com wrote:
I wonder if a CSAC used as a wristwatch would need constant C-field
adjustment?
On Thu, Apr 10, 2014 at 12:41 PM, Attila Kinali att...@kinali.ch wrote:
On Thu, 10 Apr 2014 10:43:13 -0400
Ronald
Some terminology to consider. There is the natural and damped frequency
to consider. That is, as you load the circuit, the resonance changes. If
you drive it with infinite impedance, you are at the natural frequency.
Loading it will shift the frequency, hence the damped frequency.
I would try to
On 10/04/14 00:38, Hal Murray wrote:
I've been watching the discussions and graphs for a while. ADEV seems
appropriate for cases where the noise pattern is nice. How does ADEV work
if the noise isn't nice? Are there alternatives? What's the mathematical
term for the type of noise that works
On 10/04/14 19:24, Richard (Rick) Karlquist wrote:
The trouble with ADEV is that if you average
a long time it papers over anomalous events
like crystal jumps.
ADEV is about characterizing noise powers. The better variants such as
TOTADEV and TheoADEV will be even more efficient at
On 11/04/14 22:15, Dan Kemppainen wrote:
Hi all,
I'm thinking about an upcoming project, if this is off topic please
disregard or contact me off list. :)
I have a large LC tank, with a very lossy inductor. Being driven by a
pulse width push pull driver, that is digitally controlled. The driver
Keep in mind that anything you connect across your tank circuit will affect its
resonant frequency and Q (signal source and measuring device). You need to make
sure your equipment is very loosely coupled to the UUT through small value
capacitors for instance.
Didier KO4BB
On April 11, 2014
Hi
Here’s the issue about “big powerful 32 bit ARM processors”….
At the chip level (as in no board, just the bare part to solder down) their are
many parts below $1 and some below $0.50 in reasonable quantity (say 10K).
It’s hard to find a useful MCU of any sort below $0.25, so the “premium”
A CSAC does not use magnetic field as a Cs primary frequency standard
does, AFAIK.
Ronald
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Hi,
On 10/04/14 06:43, Tom Van Baak wrote:
You are right in the I don't even need data cycles. All I want is the
error which is 5,000,000 minus the count. this is hopefully zero.
Correct. Keep the counter running. No need to zero it, ever. Use differential
measurements. Essentially you are
Its off the air over the weekend as NIST stated.
I have no idea why, but I think Chucks near Boston.
Regards
Paul.
On Fri, Apr 11, 2014 at 11:01 PM, David McGaw n1...@dartmouth.edu wrote:
Easily heard on a 12 ft wire in NH this afternoon. Chuck - You may be too
close and it is skipping over.
Bob 100% totally agree and I am seeing the same thing happening. It has to
do with the lower power consumption. When you see Intel scrambling again to
take some share thats the biggest clue there is that a shift is on the way.
But enough of that I said my piece far earlier in the chain. We sure
On 12/04/14 18:37, Ronald Held wrote:
A CSAC does not use magnetic field as a Cs primary frequency standard
does, AFAIK.
http://scpnt.stanford.edu/pnt/PNT11/2011_presentation_files/18_Lutwak-PNT2011.pdf
See page 20 where the C-field coil is depicted.
I was quite sure it was there.
Cheers,
Magnus
Interesting, Am I missing something or is there an error in your code or
logic.
Looks to me like the code is a PI controller with a added D term (Vdf)
of input,
and the D is then Integrated with a scale factor of F at Vi = Vi +
F*Vdf ...
An integrated derivative is exactly equal
Magnus,
You are very much on the track that I was thinking. I belive you are
absolutly correct
in that a 90 degree phase shift would be ideal.
I did a bit more digging last night, and it turns out that an XOR phase
comparator
looking at the tank voltage and drive voltage may be ideal, as
http://scpnt.stanford.edu/pnt/PNT11/2011_presentation_files/18_Lutwak-PNT2011.pdf
See page 20 where the C-field coil is depicted.
I was quite sure it was there.
Cheers,
Magnus
I see. I only looked at the Physics package and forgot about the C coil. Sorry.
Ronald
Hi
I’ve been working with some friends on an ARM based Arduino project. The
support for ARM in the Arduino tool chain is still not really up to speed. It’s
actually been faster / easier to take the stuff we need over to another board
and tool chain than to fight through all of the gotchas
Warren,
On 12/04/14 21:09, WarrenS wrote:
Magnus
Interesting, Am I missing something or is there an error in your code or
logic.
Looks to me like the code is a PI controller with a added D term
(Vdf) of input,
and the D is then Integrated with a scale factor of F at Vi = Vi +
F*Vdf ...
An
It is very easy to make an impedance phase detector by
inserting a toroidal current transformer in series with
the load under test. The center of the secondary is
connected to the load through a capacitor. Each end of
the secondary goes to a diode detector. When the
load is resistive, the DC
On 12/04/14 21:23, d...@irtelemetrics.com wrote:
Magnus,
You are very much on the track that I was thinking. I belive you are
absolutly correct
in that a 90 degree phase shift would be ideal.
I did a bit more digging last night, and it turns out that an XOR phase
comparator
looking at the
On 11/04/14 15:33, Tom Van Baak wrote:
Brooke, Ulrich,
Keep in mind the hp SmartClock product line dated from the early-90's and it was one of
the first GPSDO on the market. So even simple things like using timing receivers, partial
ionospheric correction, sawtooth correction, sub-ns TIC,
On 11/04/14 21:38, Chris Albertson wrote:
Look at what NTP does to select good clocks when it has many to choose
from. It does not simply average them.
It looks at the noise in each one and then sees which clocks have
overlapping error bars. It assumes that all good clocks have the same time
On 4/12/14, 12:50 PM, Bob Camp wrote:
Hi
I’ve been working with some friends on an ARM based Arduino project. The
support for ARM in the Arduino tool chain is still not really up to speed. It’s
actually been faster / easier to take the stuff we need over to another board
and tool chain than
Hi
If you are doing a GPSDO, you probably are playing a lot with things like clock
trees and PLL frequencies. There are other free toolchains (often vendor
specific) that can make this *much* easier. Not all ARM’s are the same in terms
of clocking, so it’s not a one size fits all sort of
Magnus
Thanks, even more interesting, I'll give it a try after I figger out under
what conditions it should help.
You are right, I did not fully take into account the DC offset that is
removed.
That is because it happens only once on the very first pass the code loop.
Any effect that may
Magnus
I think all three below provide the exact same results.
If true, That may not be doing what you wanted.
ws
Vi = Vi + (I * Vdp) ; Initial Vi value = - F * First_Vdp_reading)
Vf = Vi + (P+F) * Vdp
? same as:
Vi = Vi + (I * Vdp)
Vf = Vi + (P+F) * Vdp - Offset;(where
On Sat, Apr 12, 2014 at 9:48 AM, Magnus Danielson
mag...@rubidium.dyndns.org wrote:
In fact a 5 bit counter is enough, and then a '373 to sample it. The
enable to the 373 needs to be synchronous to the 5/10 MHz clock, so a pair
of DFFs ('74) is needed to synchronize the PPS and another pair
Your oscillator is on its way. I set it right on 10. MHz against a
GPSDRb house standard. You will get a better waveform out if it sees about a
100 - 200 ohm termination, though the edge is nice and sharp with some
peaking overshoot.
You might get a bit more stability if you can add
Magnus wrote
It may appear so, but the derivate, scale-factor F and integrate does not
make the scale-factor F equalent to P, since you are forgetting that the
derivate removes the DC term
We don't quite agree on that point yet.
I can not find anything different or special that your code
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