yes you are right - I'll get this if one of you don't beat me to it.
It is fine for me.
Thanks, Dave
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On Wed, 25 Feb 2009 10:30:26 +0100
Joakim Tjernlund joakim.tjernl...@transmode.se wrote:
1, 2 and 5
Acked-by: Joakim Tjernlund joakim.tjernl...@transmode.se
Don't understand cpo and haven't looked at 3 so
I can't say anything useful.
Did you test the patch on your
On Mon, 9 Mar 2009 18:03:34 +0100
Joakim Tjernlund joakim.tjernl...@transmode.se wrote:
tested working here. applied hunks 1-5.
Kim
FYI, the odt_rd_cfg and odt_wr_cfg are still
wrong for 832x. They should be
odt_rd_cfg 22
and
odt_wr_cfg 18
for 832x
yes you are right -
On Wed, 25 Feb 2009 10:30:26 +0100
Joakim Tjernlund joakim.tjernl...@transmode.se wrote:
1, 2 and 5
Acked-by: Joakim Tjernlund joakim.tjernl...@transmode.se
Don't understand cpo and haven't looked at 3 so
I can't say anything useful.
Did you test the patch on your board?
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.
The Micron
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.
The Micron
The code actually is ugly. The max operation freq of the whole 83xx
DDR controller is lagging the mainstream DDR2 DIMMs.
We have to put the high speed DIMMs to low speed controller.
It sounds like ugly. So we often happen the boundary issue.
Basically, the mainstream PC industry DDR2
1. rd_to_pre is missed to add the AL.
2. add the support of DDR2-533,667,800 DIMMs
3. cpo
4. make the AL to min to gain better performance.
The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.
Reported-by: Joakim Tjernlund
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.
The Micron MT9HTF6472CHY-667D1
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