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Hi all,

This week this patchset was tested on 4 systems, two dGPU and two APU based, 
and tested across multiple display and connection types.

APU
        * Single Display eDP -> 1080p 60hz, 1920x1200 165hz, 3840x2400 60hz
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 
240hz (Includes USB-C to DP/HDMI adapters)
        * Thunderbolt -> LG Ultrafine 5k
        * MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz 
displays, HP Hook G2 with 2x 4k60hz displays
        * USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP 
and 1x 4k60hz HDMI displays
        * SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution 
supported by the dongle of 4k 120hz YUV420 12bpc.
        * MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the 
adapter of 4k 120hz RGB 8bpc.

DGPU
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multiple Display DP -> 4k240hz + 4k144hz
        * MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
        * MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz 
displays)

The testing is a mix of automated and manual tests. Manual testing includes 
(but is not limited to)
        * Changing display configurations and settings
        * Video/Audio playback
        * Benchmark testing
        * Suspend/Resume testing
        * Feature testing (Freesync, HDCP, etc.)

Automated testing includes (but is not limited to)
        * Script testing (scripts to automate some of the manual checks)
        * IGT testing

The testing is mainly tested on the following displays, but occasionally there 
are tests with other displays
        * Samsung G8 Neo 4k240hz
        * Samsung QN55QN95B 4k 120hz
        * Acer XV322QKKV 4k144hz
        * HP U27 4k Wireless 4k60hz
        * LG 27UD58B 4k60hz
        * LG 32UN650WA 4k60hz
        * LG Ultrafine 5k 5k60hz
        * AU Optronics B140HAN01.1 1080p 60hz eDP
        * AU Optronics B160UAN01.J 1920x1200 165hz eDP
        * Samsung ATNA60YV02-0 3840x2400 60Hz OLED eDP


The patchset consists of the amd-staging-drm-next branch 
(3abbc6894f696de837f4238a0fc24b236892861a -> drm/amd/display: Promote DC to 
3.2.381) with new patches added on top of it.

Tested on Ubuntu 24.04.4, on Wayland and X11, using Gnome.

Tested-by: Dan Wheeler <[email protected]>


Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com


-----Original Message-----
From: James Lin <[email protected]>
Sent: Wednesday, May 6, 2026 12:31 AM
To: [email protected]
Cc: Wentland, Harry <[email protected]>; Li, Sun peng (Leo) 
<[email protected]>; Pillai, Aurabindo <[email protected]>; Li, Roman 
<[email protected]>; Lin, Wayne <[email protected]>; Chung, ChiaHsuan (Tom) 
<[email protected]>; Zuo, Jerry <[email protected]>; Wheeler, Daniel 
<[email protected]>; Wu, Ray <[email protected]>; LIPSKI, IVAN 
<[email protected]>; Hung, Alex <[email protected]>; Lin, Ping Lei 
<[email protected]>; Chen, Chen-Yu <[email protected]>
Subject: [PATCH 00/20] DC Patches May 11 2026

Start from:
6ee9f5160ad6e0bf672329f7680398e718fc56f5
SWDEV-114487 - modules: [BACKPORT] drm/amd/display: Fix divide by zero in 
calc_psr_num_static_frames

Stopped at:
5e7f507891f430f50c71004b73c5ef4c13224f1a
SWDEV-2 - dc: Promote DC to 3.2.382

This version brings along following update:
-Revert "Enable HUBP/OPTC/DPP power gating" -Revert "Unify fast update 
classification paths" -enable ODM 2:1 on single eDP based on pixel clock 
-Enable IPS on DCN42 -Add additional IPS entry/exit for PSR/Replay -Separate 
ABM functions into dedicated power_abm.c file -Fix always-true lower-bound 
assert -Refactor dc_link_aux_transfer_raw -only call pmfw if smu present flags 
true -Fix multiple compiler warnings -Fix CRC open failure during active 
rendering -Fix white screen on boot with OLED panel -Fix refresh rate round up 
case


Charlene Liu (2):
  drm/amd/display: only call pmfw if smu present flags true
  drm/amd/display: enable ODM 2:1 on single eDP based on pixel clock

ChunTao Tso (1):
  drm/amd/display: Fix refresh rate round up case

Clay King (1):
  drm/amd/display: Fix warnings

Gaghik Khachatrian (5):
  drm/amd/display: Fix signed/unsigned comparison mismatches
  drm/amd/display: Fix compiler warnings in dml2
  drm/amd/display: Fix multiple compiler warnings
  drm/amd/display: always-true lower-bound assert
  drm/amd/display: Fix enum decl warnings

Ivan Lipski (2):
  drm/amd/display: Add additional IPS entry/exit for PSR/Replay
  drm/amd/display: Enable IPS on DCN42

Leo Chen (1):
  drm/amd/display: Revert "Enable HUBP/OPTC/DPP power gating"

Lohita Mudimela (1):
  drm/amd/display: Separate ABM functions into dedicated power_abm.c
    file

Matthew Stewart (1):
  drm/amd/display: Refactor dc_link_aux_transfer_raw

Mikhail Gavrilov (1):
  drm/amd/display: Wrap DCN32 phantom-plane allocation in
    DC_RUN_WITH_PREEMPTION_ENABLED

Ovidiu Bunea (1):
  drm/amd/display: Revert "Unify fast update classification paths"

Ray Wu (1):
  drm/amd/display: Fix white screen on boot with OLED panel

Taimur Hassan (2):
  drm/amd/display: [FW Promotion] Release 0.1.59.0
  drm/amd/display: Promote DC to 3.2.382

Tom Chung (1):
  drm/amd/display: Fix CRC open failure during active rendering

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   22 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c |    7 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |   77 +
 .../display/dc/clk_mgr/dce100/dce_clk_mgr.c   |    6 +-
 .../display/dc/clk_mgr/dce100/dce_clk_mgr.h   |    2 +-
 .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c  |    8 +-
 .../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c  |    4 +-
 .../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h  |    2 +-
 .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c  |    2 +-
 .../dc/clk_mgr/dcn401/dcn401_clk_mgr.c        |    2 +-
 .../dc/clk_mgr/dcn401/dcn401_clk_mgr.h        |    4 +-
 .../clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.c   |    4 +-
 .../clk_mgr/dcn401/dcn401_clk_mgr_smu_msg.h   |    2 +-
 .../display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c  |   11 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c      |  260 +-
 .../drm/amd/display/dc/core/dc_hw_sequencer.c |   12 -
 .../drm/amd/display/dc/core/dc_link_exports.c |    2 +-
 .../gpu/drm/amd/display/dc/core/dc_resource.c |   18 +-
 .../gpu/drm/amd/display/dc/core/dc_state.c    |    6 +-
 .../gpu/drm/amd/display/dc/core/dc_stream.c   |    4 +-
 .../drm/amd/display/dc/core/dc_vm_helper.c    |    4 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |  105 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |    3 +-
 drivers/gpu/drm/amd/display/dc/dc_dsc.h       |    2 +-
 drivers/gpu/drm/amd/display/dc/dc_stream.h    |    7 +-
 drivers/gpu/drm/amd/display/dc/dc_types.h     |    2 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c  |   20 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_aux.h  |    4 +
 .../amd/display/dc/dcn21/dcn21_link_encoder.c |    2 +-
 .../display/dc/dio/dcn10/dcn10_link_encoder.c |    2 +-
 drivers/gpu/drm/amd/display/dc/dm_helpers.h   |    1 +
 .../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c  |    6 +-
 .../dc/dml/dcn21/display_mode_vba_21.c        |   36 +-
 .../drm/amd/display/dc/dml/dcn30/dcn30_fpu.c  |    4 +-
 .../dc/dml/dcn30/display_mode_vba_30.c        |  342 +--
 .../amd/display/dc/dml/dcn301/dcn301_fpu.c    |    2 +-
 .../dc/dml/dcn31/display_mode_vba_31.c        |  408 ++--
 .../amd/display/dc/dml/dcn314/dcn314_fpu.c    |   10 +-
 .../dc/dml/dcn314/display_mode_vba_314.c      |  400 +--
 .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c  |   15 +-
 .../dc/dml/dcn32/display_mode_vba_util_32.c   |    8 +-
 .../dc/dml/dcn32/display_mode_vba_util_32.h   |    8 +-
 .../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c  |   10 +-
 .../amd/display/dc/dml/dcn351/dcn351_fpu.c    |   10 +-
 .../drm/amd/display/dc/dml/display_mode_vba.h |   12 +-
 .../amd/display/dc/dml2_0/display_mode_core.c |    6 +-
 .../drm/amd/display/dc/dml2_0/dml2_utils.c    |    2 +-
 .../amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c   |    2 +-
 .../drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c  |    2 +-
 .../amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c   |    4 +-
 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c   |    2 +-
 .../drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c  |    8 +-
 .../drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c  |    8 +-
 .../amd/display/dc/dsc/dcn401/dcn401_dsc.c    |   10 +-
 .../amd/display/dc/hubp/dcn401/dcn401_hubp.c  |    4 +-
 .../amd/display/dc/hubp/dcn401/dcn401_hubp.h  |    2 +-
 .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c   |   10 +-
 .../amd/display/dc/hwss/dcn30/dcn30_hwseq.c   |    8 +-
 .../amd/display/dc/hwss/dcn314/dcn314_hwseq.c |    2 +-
 .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c   |    2 +-
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c   |    2 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c |    5 +-
 drivers/gpu/drm/amd/display/dc/inc/bw_fixed.h |    2 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h  |    2 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/opp.h   |    4 +-
 .../amd/display/dc/inc/hw/timing_generator.h  |    8 +-
 .../gpu/drm/amd/display/dc/inc/link_service.h |    2 +-
 .../gpu/drm/amd/display/dc/inc/reg_helper.h   |   72 +-
 .../drm/amd/display/dc/link/link_detection.c  |    2 +-
 .../drm/amd/display/dc/link/link_detection.h  |    2 +-
 .../amd/display/dc/link/protocols/link_ddc.c  |    7 +-
 .../link/protocols/link_edp_panel_control.c   |    8 +-
 .../drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c  |    2 +-
 .../drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c  |    6 +-
 .../drm/amd/display/dc/opp/dcn20/dcn20_opp.c  |    2 +-
 .../drm/amd/display/dc/opp/dcn20/dcn20_opp.h  |    2 +-
 .../amd/display/dc/optc/dcn32/dcn32_optc.c    |    2 +-
 .../dc/resource/dce100/dce100_resource.c      |   10 +-
 .../dc/resource/dce110/dce110_resource.c      |    8 +-
 .../dc/resource/dce112/dce112_resource.c      |    4 +-
 .../dc/resource/dce120/dce120_resource.c      |    6 +-
 .../dc/resource/dce80/dce80_resource.c        |    8 +-
 .../dc/resource/dcn10/dcn10_resource.c        |   15 +-
 .../dc/resource/dcn20/dcn20_resource.c        |   60 +-
 .../dc/resource/dcn21/dcn21_resource.c        |   26 +-
 .../dc/resource/dcn30/dcn30_resource.c        |   63 +-
 .../dc/resource/dcn301/dcn301_resource.c      |   31 +-
 .../dc/resource/dcn302/dcn302_resource.c      |   22 +-
 .../dc/resource/dcn303/dcn303_resource.c      |   22 +-
 .../dc/resource/dcn31/dcn31_resource.c        |   30 +-
 .../dc/resource/dcn314/dcn314_resource.c      |   26 +-
 .../dc/resource/dcn315/dcn315_resource.c      |   37 +-
 .../dc/resource/dcn316/dcn316_resource.c      |   29 +-
 .../dc/resource/dcn32/dcn32_resource.c        |   33 +-
 .../resource/dcn32/dcn32_resource_helpers.c   |    6 +-
 .../dc/resource/dcn321/dcn321_resource.c      |   22 +-
 .../dc/resource/dcn35/dcn35_resource.c        |   26 +-
 .../dc/resource/dcn351/dcn351_resource.c      |   26 +-
 .../dc/resource/dcn36/dcn36_resource.c        |   26 +-
 .../dc/resource/dcn401/dcn401_resource.c      |   32 +-
 .../dc/resource/dcn42/dcn42_resource.c        |   50 +-
 .../dc/resource/dcn42/dcn42_resource_fpu.c    |   22 +
 .../dc/resource/dcn42/dcn42_resource_fpu.h    |    2 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |   32 +-
 .../gpu/drm/amd/display/include/fixed31_32.h  |    6 +-
 .../amd/display/modules/color/color_gamma.c   |   28 +-
 .../drm/amd/display/modules/hdcp/hdcp_log.c   |    2 +-
 .../amd/display/modules/inc/mod_color_types.h |   47 +
 .../amd/display/modules/inc/mod_info_packet.h |    9 +-
 .../modules/inc/mod_info_packet_types.h       |   37 +
 .../drm/amd/display/modules/inc/mod_power.h   |   25 +
 .../drm/amd/display/modules/power/Makefile    |    2 +-
 .../gpu/drm/amd/display/modules/power/power.c | 1323 +---------  
.../drm/amd/display/modules/power/power_abm.c | 2160 +++++++++++++++++  
.../amd/display/modules/power/power_helpers.c |  823 +------
 .../amd/display/modules/power/power_helpers.h |    1 +
 116 files changed, 3922 insertions(+), 3295 deletions(-)  create mode 100644 
drivers/gpu/drm/amd/display/modules/inc/mod_color_types.h
 create mode 100644 
drivers/gpu/drm/amd/display/modules/inc/mod_info_packet_types.h
 create mode 100644 drivers/gpu/drm/amd/display/modules/power/power_abm.c

--
2.43.0

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