From: YiPeng Chai <[email protected]> Support obtaining ras capabilities.
Signed-off-by: YiPeng Chai <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 7 ++++++- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 25 ++++++++++++++++++++++++- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 1 + 3 files changed, 31 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 242c48e85912f..ad58d422204e8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -47,6 +47,7 @@ #include "amd_pcie.h" #include "amdgpu_userq.h" #include "amdgpu_video_codecs.h" +#include "amdgpu_ras_mgr.h" void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev) { @@ -1290,7 +1291,11 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) if (!ras) return -EINVAL; - ras_mask = (uint64_t)adev->ras_enabled << 32 | ras->features; + + if (amdgpu_uniras_enabled(adev)) + ras_mask = amdgpu_uniras_get_ras_caps(adev); + else + ras_mask = (uint64_t)adev->ras_enabled << 32 | ras->features; return copy_to_user(out, &ras_mask, min_t(u64, size, sizeof(ras_mask))) ? diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 378921a53b9a7..1cd12eeee12b6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -1820,8 +1820,12 @@ static ssize_t amdgpu_ras_sysfs_features_read(struct device *dev, { struct amdgpu_ras *con = container_of(attr, struct amdgpu_ras, features_attr); + u64 ras_features; - return sysfs_emit(buf, "feature mask: 0x%x\n", con->features); + ras_features = amdgpu_uniras_enabled(con->adev) ? + amdgpu_uniras_get_ras_caps(con->adev) : con->features; + + return sysfs_emit(buf, "feature mask: 0x%llx\n", ras_features); } static bool amdgpu_ras_get_version_info(struct amdgpu_device *adev, u32 *major, @@ -5003,3 +5007,22 @@ int amdgpu_ras_resume_after_reset(struct amdgpu_device *adev) return amdgpu_cper_deferred_init(adev); } + +uint64_t amdgpu_uniras_get_ras_caps(struct amdgpu_device *adev) +{ + struct ras_cmd_get_ras_cap_req req = {0}; + struct ras_cmd_get_ras_cap_rsp rsp = {0}; + union ras_feature feature = {0}; + + if (amdgpu_ras_mgr_handle_ras_cmd(adev, RAS_CMD__GET_RAS_CAP, + &req, sizeof(struct ras_cmd_get_ras_cap_req), + &rsp, sizeof(struct ras_cmd_get_ras_cap_rsp))) + return 0; + + feature.block_mask = rsp.ras_block_mask; + feature.en = adev->ras_enabled; + if (adev->smuio.funcs && adev->smuio.funcs->get_socket_id) + feature.tag = adev->smuio.funcs->get_socket_id(adev); + + return feature.value; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h index c53f911d5729f..63ea7d39b84e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h @@ -981,4 +981,5 @@ void amdgpu_ras_pre_reset(struct amdgpu_device *adev, void amdgpu_ras_post_reset(struct amdgpu_device *adev, struct list_head *device_list); int amdgpu_ras_resume_after_reset(struct amdgpu_device *adev); +uint64_t amdgpu_uniras_get_ras_caps(struct amdgpu_device *adev); #endif -- 2.55.0
