From: Xiang Liu <[email protected]> Processor CPER generation needs the APIC ID and bank number from the x86 machine-check record. CPU banks must also be logged by only one GPU to avoid duplicate processor records.
Copy the APIC ID and bank number into the rascore ACA bank and route CPU banks through the first registered GPU. Keep GPU banks routed by their decoded socket ID. Signed-off-by: Xiang Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mce.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mce.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mce.c index bc7a44618ac6c..ad978ed458437 100644 --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mce.c +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mce.c @@ -133,6 +133,8 @@ static void __fill_mce_to_aca_bank(struct amdgpu_device *adev, aca_bank->timestamp = m->time; aca_bank->bank_type = bank_type; aca_bank->ecc_type = RAS_ERR_TYPE__MCE; + aca_bank->apic_id = m->apicid; + aca_bank->bank = m->bank; aca_bank->regs[ACA_REG_IDX__STATUS] = m->status; aca_bank->regs[ACA_REG_IDX__ADDR] = m->addr; aca_bank->regs[ACA_REG_IDX__MISC0] = m->misc; @@ -186,9 +188,11 @@ static int amdgpu_ras_mce_notifier_v5(struct amdgpu_device *adev, unsigned int i if (ras_mce_check_bank(ras_mgr->ras_core, MCE_BANK_TYPE_GPU, m->bank)) { bank_type = MCE_BANK_TYPE_GPU; - /* For CPU bank, only the first registered gpu device needs to record bank */ - } else if (ras_mce_check_bank(ras_mgr->ras_core, MCE_BANK_TYPE_CPU, m->bank) && - !id) { + } else if (ras_mce_check_bank(ras_mgr->ras_core, MCE_BANK_TYPE_CPU, m->bank)) { + /* For CPU bank, only the first registered gpu device needs to record bank */ + if (id) + return 0; + bank_type = MCE_BANK_TYPE_CPU; } else { RAS_DEV_WARN(adev, "Unsupported mce bank: %u\n", m->bank); -- 2.55.0
