From: Hawking Zhang <[email protected]> Enable translate further for gc v12_1 to resolve the tlb reach issue
v2: ensure PTE.P is set to 1 for leaf PTE v3: Do not clear the P bit when it has been set on a PDB0 entry by the common VM update code Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Mukul Joshi <[email protected]> Reviewed-by: Horatio Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c | 5 ++++- drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 3 ++- drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c | 4 ---- drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c | 13 ++++++++++--- 4 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c index 1f7e57792d4dc..15d2a8ec55a6f 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c @@ -402,7 +402,10 @@ static void gfxhub_v12_1_xcc_setup_vmid_config(struct amdgpu_device *adev, num_level = adev->vm_manager.num_level; block_size = adev->vm_manager.block_size; - block_size -= 9; + if (adev->gmc.translate_further) + num_level -= 1; + else + block_size -= 9; for_each_inst(j, xcc_mask) { hub = &adev->vmhub[AMDGPU_GFXHUB(j)]; diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c index ea240aa1e4455..e69cae39b5f75 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c @@ -645,7 +645,6 @@ static int gmc_v12_0_early_init(struct amdgpu_ip_block *ip_block) case IP_VERSION(12, 1, 0): gmc_v12_1_set_gmc_funcs(adev); gmc_v12_1_set_irq_funcs(adev); - adev->gmc.init_pte_flags = AMDGPU_PTE_IS_PTE; break; default: gmc_v12_0_set_gmc_funcs(adev); @@ -855,6 +854,8 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block) amdgpu_vm_adjust_size(adev, 128 * 1024 * 1024, 9, 4, 57); pte_addr_mask = 0x000FFFFFFFFFF000ULL; /* 52 bit PA */ dma_addr_bits = 52; + adev->gmc.translate_further = adev->vm_manager.num_level > 1; + adev->gmc.init_pte_flags = AMDGPU_PTE_IS_PTE; break; default: dev_warn(adev->dev, "Unrecognized GC IP version: 0x%08x\n", diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c index b0962a14fdb4d..f9887cec9a6c3 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c @@ -597,10 +597,6 @@ static void gmc_v12_1_get_vm_pde(struct amdgpu_device *adev, int level, /* Set the block fragment size */ if (!(*flags & AMDGPU_PDE_PTE_GFX12)) *flags |= AMDGPU_PDE_BFS_GFX12(0x9); - - } else if (level == AMDGPU_VM_PDB0) { - if (*flags & AMDGPU_PDE_PTE_GFX12) - *flags &= ~AMDGPU_PDE_PTE_GFX12; } } diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c index b2a3276750deb..4495d52b4b07c 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c @@ -518,9 +518,17 @@ static void mmhub_v4_2_0_mid_setup_vmid_config(struct amdgpu_device *adev, uint32_t inst_mask) { struct amdgpu_vmhub *hub; + u32 num_level, block_size; uint32_t tmp; int i, j; + num_level = adev->vm_manager.num_level; + block_size = adev->vm_manager.block_size; + if (adev->gmc.translate_further) + num_level -= 1; + else + block_size -= 9; + for_each_inst(j, inst_mask) { hub = &adev->vmhub[AMDGPU_MMHUB0(j)]; for (i = 0; i <= 14; i++) { @@ -528,7 +536,7 @@ static void mmhub_v4_2_0_mid_setup_vmid_config(struct amdgpu_device *adev, i * hub->ctx_distance); tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, - adev->vm_manager.num_level); + num_level); tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, @@ -545,8 +553,7 @@ static void mmhub_v4_2_0_mid_setup_vmid_config(struct amdgpu_device *adev, tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, - PAGE_TABLE_BLOCK_SIZE, - adev->vm_manager.block_size - 9); + PAGE_TABLE_BLOCK_SIZE, block_size); /* Send no-retry XNACK on fault to suppress VM fault storm. */ tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, -- 2.55.0
