From: Hawking Zhang <[email protected]>

VM fault status is 64 bits on gfxhub v12_1 and
mmhub v4_2, with fields such as FED located in the
upper status register.

Add an optional HI32 fault status callback to help
identify FED status on gfxhub v12_1 and mmhub v4_2

Signed-off-by: Hawking Zhang <[email protected]>
Reviewed-by: Horatio Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h   |  3 +++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c | 20 +++++++++++++++++---
 drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c    | 10 ++++++++--
 drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c | 20 +++++++++++++++++---
 4 files changed, 45 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index c0884797dd544..cffd5ca3fc66b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -114,6 +114,8 @@ struct amdgpu_gmc_fault {
 struct amdgpu_vmhub_funcs {
        void (*print_l2_protection_fault_status)(struct amdgpu_device *adev,
                                                 uint32_t status);
+       void (*print_l2_protection_fault_status_hi)(struct amdgpu_device *adev,
+                                                   uint32_t status);
        uint32_t (*get_invalidate_req)(unsigned int vmid, uint32_t flush_type);
 };
 
@@ -125,6 +127,7 @@ struct amdgpu_vmhub {
        uint32_t        vm_inv_eng0_ack;
        uint32_t        vm_context0_cntl;
        uint32_t        vm_l2_pro_fault_status;
+       uint32_t        vm_l2_pro_fault_status_hi;
        uint32_t        vm_l2_pro_fault_cntl;
 
        /*
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c 
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
index 0d57c106f9d1c..1f7e57792d4dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
@@ -702,8 +702,18 @@ static const char *gfxhub_v12_1_client_ids[] = {
        "PA"
 };
 
-/*TODO: l2 protection fault status is increased to 64bits.
- * some critical fields like FED are moved to STATUS_HI32 */
+static void
+gfxhub_v12_1_print_l2_protection_fault_status_hi(struct amdgpu_device *adev,
+                                                uint32_t status)
+{
+       dev_err(adev->dev,
+               "GCVM_L2_PROTECTION_FAULT_STATUS_HI32:0x%08X\n",
+               status);
+       dev_err(adev->dev, "\t FED: 0x%lx\n",
+               REG_GET_FIELD(status,
+                             GCVM_L2_PROTECTION_FAULT_STATUS_HI32, FED));
+}
+
 static void gfxhub_v12_1_print_l2_protection_fault_status(struct amdgpu_device 
*adev,
                                                          uint32_t status)
 {
@@ -736,6 +746,8 @@ static void 
gfxhub_v12_1_print_l2_protection_fault_status(struct amdgpu_device *
 
 static const struct amdgpu_vmhub_funcs gfxhub_v12_1_vmhub_funcs = {
        .print_l2_protection_fault_status = 
gfxhub_v12_1_print_l2_protection_fault_status,
+       .print_l2_protection_fault_status_hi =
+               gfxhub_v12_1_print_l2_protection_fault_status_hi,
        .get_invalidate_req = gfxhub_v12_1_get_invalidate_req,
 };
 
@@ -765,10 +777,12 @@ static void gfxhub_v12_1_xcc_init(struct amdgpu_device 
*adev, uint32_t xcc_mask)
                hub->vm_context0_cntl =
                        SOC15_REG_OFFSET(GC, GET_INST(GC, i),
                                regGCVM_CONTEXT0_CNTL);
-               /* TODO: add a new member to accomandate additional fault 
status/cntl reg */
                hub->vm_l2_pro_fault_status =
                        SOC15_REG_OFFSET(GC, GET_INST(GC, i),
                                regGCVM_L2_PROTECTION_FAULT_STATUS_LO32);
+               hub->vm_l2_pro_fault_status_hi =
+                       SOC15_REG_OFFSET(GC, GET_INST(GC, i),
+                                        
regGCVM_L2_PROTECTION_FAULT_STATUS_HI32);
                hub->vm_l2_pro_fault_cntl =
                        SOC15_REG_OFFSET(GC, GET_INST(GC, i),
                                regGCVM_L2_PROTECTION_FAULT_CNTL_LO32);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
index e8e35d1b22765..b0962a14fdb4d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
@@ -128,7 +128,7 @@ static int gmc_v12_1_process_interrupt(struct amdgpu_device 
*adev,
        uint32_t cam_index = 0;
        const char *hub_name;
        int ret, xcc_id = 0;
-       uint32_t status = 0;
+       uint32_t status = 0, status_hi = 0;
        const char *die_name;
        char die_name_buf[32];
        u64 addr;
@@ -243,11 +243,14 @@ static int gmc_v12_1_process_interrupt(struct 
amdgpu_device *adev,
                RREG32(hub->vm_l2_pro_fault_status);
 
        status = RREG32(hub->vm_l2_pro_fault_status);
+       if (hub->vmhub_funcs &&
+           hub->vmhub_funcs->print_l2_protection_fault_status_hi)
+               status_hi = RREG32(hub->vm_l2_pro_fault_status_hi);
 
        /* Only print L2 fault status if the status register could be read and
         * contains useful information
         */
-       if (!status)
+       if (!status && !status_hi)
                return 0;
 
        WREG32_P(hub->vm_l2_pro_fault_cntl, 1, ~1);
@@ -260,6 +263,9 @@ static int gmc_v12_1_process_interrupt(struct amdgpu_device 
*adev,
        }
 
        hub->vmhub_funcs->print_l2_protection_fault_status(adev, status);
+       if (hub->vmhub_funcs->print_l2_protection_fault_status_hi)
+               hub->vmhub_funcs->print_l2_protection_fault_status_hi(adev,
+                                                                    status_hi);
 
        return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
index 8bed4addba426..b2a3276750deb 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c
@@ -732,8 +732,18 @@ static uint32_t mmhub_v4_2_0_get_invalidate_req(unsigned 
int vmid,
        return req;
 }
 
-/*TODO: l2 protection fault status is increased to 64bits.
- * some critical fields like FED are moved to STATUS_HI32 */
+static void
+mmhub_v4_2_0_print_l2_protection_fault_status_hi(struct amdgpu_device *adev,
+                                                uint32_t status)
+{
+       dev_err(adev->dev,
+               "MMVM_L2_PROTECTION_FAULT_STATUS_HI32:0x%08X\n",
+               status);
+       dev_err(adev->dev, "\t FED: 0x%lx\n",
+               REG_GET_FIELD(status,
+                             MMVM_L2_PROTECTION_FAULT_STATUS_HI32, FED));
+}
+
 static void
 mmhub_v4_2_0_print_l2_protection_fault_status(struct amdgpu_device *adev,
                                              uint32_t status)
@@ -770,6 +780,8 @@ mmhub_v4_2_0_print_l2_protection_fault_status(struct 
amdgpu_device *adev,
 
 static const struct amdgpu_vmhub_funcs mmhub_v4_2_0_vmhub_funcs = {
        .print_l2_protection_fault_status = 
mmhub_v4_2_0_print_l2_protection_fault_status,
+       .print_l2_protection_fault_status_hi =
+               mmhub_v4_2_0_print_l2_protection_fault_status_hi,
        .get_invalidate_req = mmhub_v4_2_0_get_invalidate_req,
 };
 
@@ -800,10 +812,12 @@ static void mmhub_v4_2_0_mid_init(struct amdgpu_device 
*adev,
                hub->vm_context0_cntl =
                        SOC15_REG_OFFSET(MMHUB, GET_INST(MMHUB, i),
                                         regMMVM_CONTEXT0_CNTL);
-               /* TODO: add a new member to accomandate additional fault 
status/cntl reg */
                hub->vm_l2_pro_fault_status =
                        SOC15_REG_OFFSET(MMHUB, GET_INST(MMHUB, i),
                                         
regMMVM_L2_PROTECTION_FAULT_STATUS_LO32);
+               hub->vm_l2_pro_fault_status_hi =
+                       SOC15_REG_OFFSET(MMHUB, GET_INST(MMHUB, i),
+                                        
regMMVM_L2_PROTECTION_FAULT_STATUS_HI32);
                hub->vm_l2_pro_fault_cntl =
                        SOC15_REG_OFFSET(MMHUB, GET_INST(MMHUB, i),
                                         regMMVM_L2_PROTECTION_FAULT_CNTL_LO32);
-- 
2.55.0

Reply via email to