From: Gabe Teeger <[email protected]>

[Why]
DCN42B has no MALL, but the resource file advertised MALL and CAB
sizes. SubVP was also enabled even though its phantom surfaces
are allocated in MALL.

[How]
Drop the MALL and SubVP caps, the dml2_options svp_pstate and
mall_cfg setup, and the add_phantom_pipes and
calculate_mall_ways_from_bytes callbacks. Disable SubVP.

Reviewed-by: Matthew Stewart <[email protected]>
Signed-off-by: Gabe Teeger <[email protected]>
Signed-off-by: Chenyu Chen <[email protected]>
---
 .../dc/resource/dcn42b/dcn42b_resource.c      | 45 +------------------
 1 file changed, 2 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c 
b/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
index 092b61b3fafc..b31f8cbd5f4c 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c
@@ -851,7 +851,8 @@ static const struct dc_debug_options debug_defaults_drv = {
        .minimum_z8_residency_time = 1, /* Always allow when other conditions 
are met */
        .support_eDP1_5 = true,
        .use_max_lb = true,
-       .force_disable_subvp = false,
+       /* SubVP phantom surfaces require MALL, which DCN42B does not have */
+       .force_disable_subvp = true,
        .exit_idle_opt_for_cursor_updates = true,
        .using_dml2 = true,
        .using_dml21 = true,
@@ -1974,8 +1975,6 @@ static struct resource_funcs dcn42b_res_pool_funcs = {
        .get_panel_config_defaults = dcn42b_get_panel_config_defaults,
        //.get_preferred_eng_id_dpia = dcn42b_get_preferred_eng_id_dpia,
        .update_soc_for_wm_a = dcn30_update_soc_for_wm_a,
-       .add_phantom_pipes = dcn32_add_phantom_pipes,
-       .calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,
        .prepare_mcache_programming = dcn42b_prepare_mcache_programming,
        .build_pipe_pix_clk_params = dcn42b_build_pipe_pix_clk_params,
        .get_power_profile = dcn401_get_power_profile,
@@ -2041,27 +2040,7 @@ static bool dcn42b_resource_construct(
        dc->caps.cursor_not_scaled = true;
        dc->caps.min_horizontal_blanking_period = 80;
        dc->caps.dmdata_alloc_size = 2048;
-       dc->caps.mall_size_per_mem_channel = 4;
-       /* total size = mall per channel * num channels * 1024 * 1024 */
-       dc->caps.mall_size_total = dc->caps.mall_size_per_mem_channel *
-               dc->ctx->dc_bios->vram_info.num_chans * 1048576;
        dc->caps.cursor_cache_size = dc->caps.max_cursor_size * 
dc->caps.max_cursor_size * 8;
-       dc->caps.cache_line_size = 64;
-       dc->caps.cache_num_ways = 16;
-
-       /* Calculate the available MALL space */
-       dc->caps.max_cab_allocation_bytes =
-               dcn32_calc_num_avail_chans_for_mall(dc, 
dc->ctx->dc_bios->vram_info.num_chans) *
-                               dc->caps.mall_size_per_mem_channel * 1024 * 
1024;
-       dc->caps.mall_size_total = dc->caps.max_cab_allocation_bytes;
-
-       dc->caps.subvp_fw_processing_delay_us = 15;
-       dc->caps.subvp_drr_max_vblank_margin_us = 40;
-       dc->caps.subvp_prefetch_end_to_mall_start_us = 15;
-       dc->caps.subvp_swath_height_margin_lines = 16;
-       dc->caps.subvp_pstate_allow_width_us = 20;
-       dc->caps.subvp_vertical_int_margin_us = 30;
-       dc->caps.subvp_drr_vblank_start_margin_us = 100; // 100us margin
 
        dc->caps.max_slave_planes = 2;
        dc->caps.max_slave_yuv_planes = 2;
@@ -2449,26 +2428,6 @@ static bool dcn42b_resource_construct(
        resource_init_common_dml2_callbacks(dc, &dc->dml2_options);
        
dc->dml2_options.callbacks.can_support_mclk_switch_using_fw_based_vblank_stretch
 =
                        
&dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch;
-       dc->dml2_options.svp_pstate.callbacks.release_dsc = &dcn20_release_dsc;
-       dc->dml2_options.svp_pstate.callbacks.calculate_mall_ways_from_bytes =
-               pool->base.funcs->calculate_mall_ways_from_bytes;
-
-       dc->dml2_options.svp_pstate.subvp_fw_processing_delay_us = 
dc->caps.subvp_fw_processing_delay_us;
-       dc->dml2_options.svp_pstate.subvp_prefetch_end_to_mall_start_us = 
dc->caps.subvp_prefetch_end_to_mall_start_us;
-       dc->dml2_options.svp_pstate.subvp_pstate_allow_width_us = 
dc->caps.subvp_pstate_allow_width_us;
-       dc->dml2_options.svp_pstate.subvp_swath_height_margin_lines = 
dc->caps.subvp_swath_height_margin_lines;
-
-       dc->dml2_options.svp_pstate.force_disable_subvp = 
dc->debug.force_disable_subvp;
-       dc->dml2_options.svp_pstate.force_enable_subvp = 
dc->debug.force_subvp_mclk_switch;
-
-       dc->dml2_options.mall_cfg.cache_line_size_bytes = 
dc->caps.cache_line_size;
-       dc->dml2_options.mall_cfg.cache_num_ways = dc->caps.cache_num_ways;
-       dc->dml2_options.mall_cfg.max_cab_allocation_bytes =
-                               dc->caps.max_cab_allocation_bytes;
-       dc->dml2_options.mall_cfg.mblk_height_4bpe_pixels = 
DCN3_2_MBLK_HEIGHT_4BPE;
-       dc->dml2_options.mall_cfg.mblk_height_8bpe_pixels = 
DCN3_2_MBLK_HEIGHT_8BPE;
-       dc->dml2_options.mall_cfg.mblk_size_bytes = DCN3_2_MALL_MBLK_SIZE_BYTES;
-       dc->dml2_options.mall_cfg.mblk_width_pixels = DCN3_2_MBLK_WIDTH;
 
        dc->dml2_options.max_segments_per_hubp = 24;
        dc->dml2_options.det_segment_size = DCN42_CRB_SEGMENT_SIZE_KB;
-- 
2.43.0

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