From: James Lin <[email protected]>
[Why]
Commit 07bf51a19bf3 ("drm/amd/display: fix __udivdi3 link error") switched
get_dp_dto_frequency_100hz() and dcn401_get_dp_dto_frequency_100hz() to
div_u64() but dropped the original explicit casts, leaving two issues:
- In get_dp_dto_frequency_100hz(), "clock_hz * dp_dto_ref_khz * 10" is
computed in 32-bit unsigned arithmetic (both operands are unsigned int)
before being stored into the u64 temp, so the product can overflow
before it is widened (flagged by Coverity OVERFLOW_BEFORE_WIDEN).
- div_u64() returns a u64 that is assigned directly to the unsigned int
*pixel_clk_100hz, an implicit narrowing conversion that trips
-Wconversion (possible loss of data) on stricter builds.
[How]
Cast clock_hz to unsigned long long so the multiplication is performed in
64-bit, and make the u64 -> unsigned int narrowing explicit with an
(unsigned int) cast on the div_u64() results in both functions. The
computed values are unchanged.
Fixes: 07bf51a19bf3 ("drm/amd/display: fix __udivdi3 link error")
Reviewed-by: Wayne Lin <[email protected]>
Signed-off-by: James Lin <[email protected]>
Signed-off-by: Chenyu Chen <[email protected]>
---
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index 20ccecf23677..f88404a37dea 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -1232,9 +1232,9 @@ static bool get_dp_dto_frequency_100hz(
*/
modulo_hz = REG_READ(MODULO[inst]);
if (modulo_hz) {
- temp = clock_hz * dp_dto_ref_khz * 10;
+ temp = (unsigned long long)clock_hz *
dp_dto_ref_khz * 10;
ASSERT(temp <= UINT_MAX * modulo_hz * 100ULL);
- *pixel_clk_100hz = div_u64(temp, modulo_hz *
100);
+ *pixel_clk_100hz = (unsigned int)div_u64(temp,
modulo_hz * 100);
} else
*pixel_clk_100hz = 0;
} else {
@@ -1293,7 +1293,7 @@ static bool dcn401_get_dp_dto_frequency_100hz(const
struct clock_source *clock_s
BREAK_TO_DEBUGGER();
*pixel_clk_100hz = 0;
} else {
- *pixel_clk_100hz = div_u64(temp, 100);
+ *pixel_clk_100hz = (unsigned int)div_u64(temp, 100);
}
return true;
--
2.43.0
