Public

Hi all,

This week this patchset was tested on 4 systems, two dGPU and two APU based, 
and tested across multiple display and connection types.

APU
        * Single Display eDP -> 1080p 60hz, 1920x1200 165hz, 3840x2400 60hz
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 
240hz (Includes USB-C to DP/HDMI adapters)
        * Thunderbolt -> LG Ultrafine 5k
        * MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz 
displays, HP Hook G2 with 2x 4k60hz displays
        * USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP 
and 1x 4k60hz HDMI displays
        * SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution 
supported by the dongle of 4k 120hz YUV420 12bpc.
        * MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the 
adapter of 4k 120hz RGB 8bpc.

DGPU
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multiple Display DP -> 4k240hz + 4k144hz
        * MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
        * MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz 
displays)

The testing is a mix of automated and manual tests. Manual testing includes 
(but is not limited to)
        * Changing display configurations and settings
        * Video/Audio playback
        * Benchmark testing
        * Suspend/Resume testing
        * Feature testing (Freesync, HDCP, etc.)

Automated testing includes (but is not limited to)
        * Script testing (scripts to automate some of the manual checks)
        * IGT testing

The testing is mainly tested on the following displays, but occasionally there 
are tests with other displays
        * Samsung G8 Neo 4k240hz
        * Samsung QN55QN95B 4k 120hz
        * Acer XV322QKKV 4k144hz
        * HP U27 4k Wireless 4k60hz
        * LG 27UD58B 4k60hz
        * LG 32UN650WA 4k60hz
        * LG Ultrafine 5k 5k60hz
        * AU Optronics B140HAN01.1 1080p 60hz eDP
        * AU Optronics B160UAN01.J 1920x1200 165hz eDP
        * Samsung ATNA60YV02-0 3840x2400 60Hz OLED eDP


The patchset consists of the amd-staging-drm-next branch (Head commit -> 
29393ab0e49fe052ee7292481733c3d0ce7151e2 -> drm/amd/display: Promote DC to 
3.2.397) with new patches added on top of it.

Tested on Ubuntu 26.04, on Gnome Wayland.

Tested-by: Dan Wheeler <[email protected]>



Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com


-----Original Message-----
From: Chenyu Chen <[email protected]>
Sent: Tuesday, September 8, 2026 7:31 AM
To: [email protected]
Cc: Wentland, Harry <[email protected]>; Li, Sun peng (Leo) 
<[email protected]>; Pillai, Aurabindo <[email protected]>; Li, Roman 
<[email protected]>; Lin, Wayne <[email protected]>; Chung, ChiaHsuan (Tom) 
<[email protected]>; Zuo, Jerry <[email protected]>; Wheeler, Daniel 
<[email protected]>; Wu, Ray <[email protected]>; LIPSKI, IVAN 
<[email protected]>; Hung, Alex <[email protected]>; Lin, Ping Lei 
<[email protected]>; Chen, Chen-Yu <[email protected]>; Chen, Chen-Yu 
<[email protected]>
Subject: [PATCH 00/66] DC Patches Sep 14 2026

This DC patchset brings improvements in multiple areas. In summary, we 
highlight:

 - Expand amdgpu_dm KUnit coverage across connector init, sink stream
   creation, FreeSync caps, forced atomic commit, plane modifiers, cursor
   updates, panic flush, MST connector creation, AUX transfers, link
   bandwidth readback and MST DSC configuration.
 - Refactor RMCM into a separate module.
 - Decouple cursor offload hwss executors from pipe context.
 - Decouple HUBP_UPDATE_PLANE_ADDR from pipe_ctx.
 - Rename lock_and_validation_needed to needs_dc_state_realloc.
 - Drop the dead update_type param from update_planes_and_stream_adapter.
 - Attach only plane updates and stream updates that actually changed.
 - Unify fast update classification paths.
 - Request DMUB HW cursor offload.
 - Program DCC as part of address update.
 - Update LLS and UPSP programming paths.
 - Add lock-free memory pool.
 - Add instance field to struct mpc and struct dccg.
 - Cleanup DMUB command submission interfaces.
 - Add inbox0 HW lock helpers for DCN35.
 - Atomize IRQ register read/modify/write ops.
 - Add Replay cumulative residency query.
 - Add urgent assertion counter probe.
 - Add debug option to force optional UCLK support.
 - Force DSC to 8bpp for SST and MST DP tunneling over USB4.
 - Honor forced RGB pixel encoding.
 - Add option for certain panels to disable FEC.
 - Cap DML2.1 vmin ODM combine at 2:1 for eDP.
 - Add is_odm_enabled callback to skip init_odm on active ODM pipes.
 - Remove MALL capabilities from DCN42B.
 - Skip MALL calculations when there is no MALL.
 - Enable power gating on dcn42b.
 - Remove SDPIF_PORT_CONTROL programming for DCN31/35/42.
 - Enable back alt-ch.
 - Flush ISM work before releasing the stream.
 - Fix HDMI FRL audio enable.
 - Fix peak bandwidth measurement sequence.
 - Bound the DSC power gating loop by num_dsc.
 - Cast DP DTO pixel clock math to avoid overflow and narrowing.
 - Use unsigned types for FRL cap check params and HPO read_state.
 - Return success status from check_mode_supported.
 - Add SPDX license identifier to dcn30_dpp_cm.c.

Cc: Daniel Wheeler <[email protected]>

Alex Hung (25):
  drm/amd/display: Test sink stream creation
  drm/amd/display: Test connector init helper
  drm/amd/display: Test HDMI connector init
  drm/amd/display: Test FreeSync caps update
  drm/amd/display: Test connector init
  drm/amd/display: Test forced atomic commit
  drm/amd/display: Test DCC reject for multi-plane format
  drm/amd/display: Test modifier list growth failure
  drm/amd/display: Test pre-GFX9 plane buffer attributes
  drm/amd/display: Test accepted plane atomic check
  drm/amd/display: Test cursor update without DC stream
  drm/amd/display: Test panic flush DCC teardown
  drm/amd/display: Test optional plane property creation
  drm/amd/display: Build MST DSC helpers for KUnit
  drm/amd/display: Test oversized AUX transfer
  drm/amd/display: Test MST connector creation
  drm/amd/display: Test link bandwidth readback
  drm/amd/display: Test cascaded Panamera check
  drm/amd/display: Test DSC caps validation
  drm/amd/display: Test MST port mode support
  drm/amd/display: Test FRL bandwidth lookup
  drm/amd/display: Test DSC precompute helpers
  drm/amd/display: Test DSC recompute check
  drm/amd/display: Test DSC config computation
  drm/amd/display: Test per-link DSC configs

Alvin Lee (5):
  drm/amd/display: Update LLS and UPSP programming paths
  drm/amd/display: Add debug option to force optional UCLK support
  drm/amd/display: Enable back alt-ch
  drm/amd/display: Program DCC as part of address update
  drm/amd/display: Return success status from check_mode_supported

Chenyu Chen (1):
  drm/amd/display: Use unsigned types for FRL cap check params and HPO
    read_state

Dillon Varone (1):
  drm/amd/display: Cleanup DMUB command submission interfaces

Dominik Kaszewski (1):
  drm/amd/display: Add lock-free memory pool

Fangzhi Zuo (2):
  drm/amd/display: Force DSC to 8bpp for MST DP tunneling over USB4
  drm/amd/display: Force DSC to 8bpp for SST DP tunneling over USB4

Gabe Teeger (4):
  drm/amd/display: Enable power gating on dcn42b
  drm/amd/display: Bound DSC power gating loop by num_dsc
  drm/amd/display: Remove MALL capabilities from DCN42B
  drm/amd/display: Remove MALL capabilities from DCN42B bounding box

Ilya Bakoulin (1):
  drm/amd/display: Fix HDMI FRL audio enable

Ivan Lipski (1):
  drm/amd/display: Honor forced RGB pixel encoding

James Lin (6):
  drm/amd/display: Rename lock_and_validation_needed to
    needs_dc_state_realloc
  drm/amd/display: Attach only plane updates that actually changed
  drm/amd/display: Request DMUB HW cursor offload
  drm/amd/display: Send stream_update to DC only when it changed
  drm/amd/display: Drop dead update_type param from
    update_planes_and_stream_adapter
  drm/amd/display: Cast DP DTO pixel clock math to avoid overflow and
    narrowing

Leo Chen (1):
  drm/amd/display: Cap DML2.1 vmin ODM combine at 2:1 for eDP

Leo Li (1):
  drm/amd/display: Atomize IRQ register read/modify/write ops

Ovidiu Bunea (2):
  drm/amd/display: Remove SDPIF_PORT_CONTROL programming for DCN31/35/42
  drm/amd/display: Add condition to skip MALL calculations if there is
    no MALL

Rafal Ostrowski (2):
  drm/amd/display: Refactor RMCM into a separate module
  drm/amd/display: Unify fast update classification paths

Ray Wu (1):
  drm/amd/display: Flush ISM work before releasing the stream

Taimur Hassan (1):
  drm/amd/display: Promote DC to 3.2.398

Tom Chung (1):
  drm/amd/display: Add inbox0 HW lock helpers for DCN35

Tomasz Siemek (2):
  drm/amd/display: Decouple cursor offload hwss executors from pipe
    context
  drm/amd/display: Decouple HUBP_UPDATE_PLANE_ADDR from pipe_ctx

Tony Cheng (3):
  drm/amd/display: Add instance field to struct mpc
  drm/amd/display: Add instance field to struct dccg
  drm/amd/display: Add SPDX license identifier to dcn30_dpp_cm.c

Wang, Sung-huai (1):
  drm/amd/display: Add is_odm_enabled callback to skip init_odm on
    active ODM pipes

Wei-Guang Li (1):
  drm/amd/display: Add Replay cumulative residency query

Wenjing Liu (2):
  drm/amd/display: Add urgent assertion counter probe
  drm/amd/display: Fix peak bandwidth measurement sequence

Yi-Ling Chen (1):
  drm/amd/display: Add option for certain panels to disable FEC

 drivers/gpu/drm/amd/display/Makefile          |    1 +
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  113 +-
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |   27 +-
 .../display/amdgpu_dm/amdgpu_dm_connector.c   |   19 +-
 .../display/amdgpu_dm/amdgpu_dm_connector.h   |    1 +
 .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c    |    9 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |    3 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c |   64 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_irq.h |   28 +
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c |   21 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_ism.h |    2 +-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   61 +-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.h   |   19 +
 .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   |   33 +
 .../tests/amdgpu_dm_connector_test.c          | 1345 +++++++++++
 .../amdgpu_dm/tests/amdgpu_dm_crtc_test.c     |   16 +-
 .../amdgpu_dm/tests/amdgpu_dm_helpers_test.c  |    8 +-
 .../amdgpu_dm/tests/amdgpu_dm_irq_test.c      |   34 +-
 .../amdgpu_dm/tests/amdgpu_dm_ism_test.c      |   83 +-
 .../tests/amdgpu_dm_mst_types_test.c          | 2041 ++++++++++++++++-
 .../amdgpu_dm/tests/amdgpu_dm_plane_test.c    |  357 ++-
 .../display/amdgpu_dm/tests/amdgpu_dm_test.c  |    4 +-
 drivers/gpu/drm/amd/display/dc/Makefile       |    3 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c      |  254 +-
 .../drm/amd/display/dc/core/dc_hw_sequencer.c |  246 +-  
.../gpu/drm/amd/display/dc/core/dc_resource.c |  147 +-
 .../gpu/drm/amd/display/dc/core/dc_state.c    |    2 -
 .../gpu/drm/amd/display/dc/core/dc_stream.c   |  124 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |   48 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |   50 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  |   12 +-
 .../gpu/drm/amd/display/dc/dc_memory_pool.c   |  277 +++
 .../gpu/drm/amd/display/dc/dc_memory_pool.h   |  107 +
 drivers/gpu/drm/amd/display/dc/dc_stream.h    |   14 +-
 .../amd/display/dc/dccg/dcn20/dcn20_dccg.c    |    1 +
 .../amd/display/dc/dccg/dcn201/dcn201_dccg.c  |    1 +
 .../amd/display/dc/dccg/dcn21/dcn21_dccg.c    |    1 +
 .../amd/display/dc/dccg/dcn30/dcn30_dccg.c    |    2 +
 .../amd/display/dc/dccg/dcn301/dcn301_dccg.c  |    1 +
 .../amd/display/dc/dccg/dcn31/dcn31_dccg.c    |    1 +
 .../amd/display/dc/dccg/dcn314/dcn314_dccg.c  |    1 +
 .../amd/display/dc/dccg/dcn32/dcn32_dccg.c    |    1 +
 .../amd/display/dc/dccg/dcn35/dcn35_dccg.c    |    1 +
 .../amd/display/dc/dccg/dcn401/dcn401_dccg.c  |    1 +
 .../amd/display/dc/dccg/dcn42/dcn42_dccg.c    |    1 +
 .../amd/display/dc/dccg/dcn60/dcn60_dccg.c    |    1 +
 .../drm/amd/display/dc/dce/dce_clock_source.c |    6 +-
 .../gpu/drm/amd/display/dc/dce/dmub_replay.c  |   25 +
 .../gpu/drm/amd/display/dc/dce/dmub_replay.h  |    2 +
 .../dml21/inc/bounding_boxes/dcn42b_soc_bb.h  |    2 +-
 .../src/dml2_core/dml2_core_dcn4_calcs.c      |    4 +
 .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c  |   11 +-
 .../dml2_0/dml21/src/dml2_top/dml2_top_utm.c  |    2 +-
 .../dml21_wrapper/dml21_translation_helper.c  |    1 +
 .../amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c   |    2 +
 .../drm/amd/display/dc/dpp/dcn50/dcn50_dpp.c  |   20 +-
 .../drm/amd/display/dc/dpp/dcn50/dcn50_dpp.h  |    3 +-
 .../hpo/dcn30/dcn30_hpo_frl_stream_encoder.c  |    6 +-
 .../hpo/dcn42/dcn42_hpo_frl_stream_encoder.c  |    9 +-
 .../hpo/dcn60/dcn60_hpo_frl_stream_encoder.c  |    9 +-
 .../display/dc/hubbub/dcn31/dcn31_hubbub.c    |    5 -
 .../display/dc/hubbub/dcn35/dcn35_hubbub.c    |    7 +-
 .../display/dc/hubbub/dcn42/dcn42_hubbub.c    |   13 +-
 .../display/dc/hubbub/dcn60/dcn60_hubbub.c    |   44 +-
 .../amd/display/dc/hubp/dcn10/dcn10_hubp.c    |    4 +-
 .../amd/display/dc/hubp/dcn10/dcn10_hubp.h    |    3 +-
 .../amd/display/dc/hubp/dcn20/dcn20_hubp.c    |    5 +-
 .../amd/display/dc/hubp/dcn20/dcn20_hubp.h    |    3 +-
 .../amd/display/dc/hubp/dcn21/dcn21_hubp.c    |    5 +-
 .../amd/display/dc/hubp/dcn30/dcn30_hubp.c    |    5 +-
 .../amd/display/dc/hubp/dcn30/dcn30_hubp.h    |    3 +-
 .../amd/display/dc/hubp/dcn401/dcn401_hubp.c  |    9 +-
 .../amd/display/dc/hubp/dcn401/dcn401_hubp.h  |    3 +-
 .../amd/display/dc/hubp/dcn42/dcn42_hubp.c    |    6 +-
 .../amd/display/dc/hubp/dcn50/dcn50_hubp.c    |   28 +-
 .../amd/display/dc/hubp/dcn50/dcn50_hubp.h    |    3 +-
 .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c   |  108 +-
 .../amd/display/dc/hwss/dcn10/dcn10_hwseq.h   |    2 +
 .../amd/display/dc/hwss/dcn10/dcn10_init.c    |    1 +
 .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c   |   40 +-
 .../amd/display/dc/hwss/dcn20/dcn20_hwseq.h   |    2 +
 .../amd/display/dc/hwss/dcn20/dcn20_init.c    |    1 +
 .../amd/display/dc/hwss/dcn201/dcn201_hwseq.c |   27 +-
 .../amd/display/dc/hwss/dcn201/dcn201_hwseq.h |    2 +
 .../amd/display/dc/hwss/dcn201/dcn201_init.c  |    1 +
 .../amd/display/dc/hwss/dcn21/dcn21_init.c    |    1 +
 .../amd/display/dc/hwss/dcn30/dcn30_init.c    |    1 +
 .../amd/display/dc/hwss/dcn301/dcn301_init.c  |    1 +
 .../amd/display/dc/hwss/dcn31/dcn31_init.c    |    1 +
 .../amd/display/dc/hwss/dcn314/dcn314_init.c  |    1 +
 .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c   |   43 +-
 .../amd/display/dc/hwss/dcn32/dcn32_init.c    |    1 +
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c   |  117 +-
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.h   |   14 +-
 .../amd/display/dc/hwss/dcn35/dcn35_init.c    |    1 +
 .../amd/display/dc/hwss/dcn351/dcn351_init.c  |    1 +
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c |   39 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |    5 +-
 .../amd/display/dc/hwss/dcn401/dcn401_init.c  |    1 +
 .../amd/display/dc/hwss/dcn42/dcn42_hwseq.c   |  283 ++-
 .../amd/display/dc/hwss/dcn42/dcn42_hwseq.h   |   17 +-
 .../amd/display/dc/hwss/dcn42/dcn42_init.c    |    6 +-
 .../amd/display/dc/hwss/dcn50/dcn50_hwseq.c   |   10 +-
 .../amd/display/dc/hwss/dcn60/dcn60_hwseq.c   |  194 +-
 .../amd/display/dc/hwss/dcn60/dcn60_hwseq.h   |    5 +-
 .../amd/display/dc/hwss/dcn60/dcn60_init.c    |    8 +-
 .../drm/amd/display/dc/hwss/hw_sequencer.h    |   70 +-
 .../display/dc/hwss/hw_sequencer_private.h    |    4 +
 .../gpu/drm/amd/display/dc/inc/core_types.h   |    4 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h  |    1 +
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h   |    3 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h  |    4 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h   |   65 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/rmcm.h  |  140 ++
 .../amd/display/dc/inc/hw/timing_generator.h  |    1 +
 .../gpu/drm/amd/display/dc/inc/link_service.h |    2 +
 drivers/gpu/drm/amd/display/dc/inc/resource.h |   18 +-
 .../drm/amd/display/dc/link/link_factory.c    |    1 +
 .../link/protocols/link_edp_panel_control.c   |   22 +
 .../link/protocols/link_edp_panel_control.h   |    2 +
 .../drm/amd/display/dc/mpc/dcn10/dcn10_mpc.c  |    1 +
 .../drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c  |    1 +
 .../drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c  |    1 +
 .../drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c  |    1 +
 .../amd/display/dc/mpc/dcn401/dcn401_mpc.c    |    1 +
 .../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.c  |  680 +-----  
.../drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h  |  714 +-----
 .../drm/amd/display/dc/mpc/dcn60/dcn60_mpc.c  |   41 +-
 .../drm/amd/display/dc/mpc/dcn60/dcn60_mpc.h  |  238 --
 .../amd/display/dc/optc/dcn31/dcn31_optc.c    |   10 +
 .../amd/display/dc/optc/dcn31/dcn31_optc.h    |    1 +
 .../amd/display/dc/optc/dcn314/dcn314_optc.c  |    1 +
 .../amd/display/dc/optc/dcn35/dcn35_optc.c    |    1 +
 .../amd/display/dc/optc/dcn42/dcn42_optc.c    |    1 +
 drivers/gpu/drm/amd/display/dc/os_types.h     |    1 +
 .../amd/display/dc/pg/dcn42/dcn42_pg_cntl.c   |    4 +
 .../dc/resource/dcn42/dcn42_resource.c        |   56 +-
 .../dc/resource/dcn42b/dcn42b_resource.c      |  123 +-
 .../dc/resource/dcn60/dcn60_resource.c        |   20 +-
 drivers/gpu/drm/amd/display/dc/rmcm/Makefile  |   44 +
 .../amd/display/dc/rmcm/dcn42/dcn42_rmcm.c    |  867 +++++++
 .../amd/display/dc/rmcm/dcn42/dcn42_rmcm.h    |  717 ++++++
 .../amd/display/dc/rmcm/dcn60/dcn60_rmcm.c    |  251 ++
 .../amd/display/dc/rmcm/dcn60/dcn60_rmcm.h    |   35 +
 drivers/gpu/drm/amd/display/dmub/dmub_srv.h   |    2 +-
 .../gpu/drm/amd/display/dmub/src/dmub_srv.c   |    7 +-
 .../drm/amd/display/modules/inc/mod_power.h   |    3 +
 .../amd/display/modules/power/power_replay.c  |   13 +
 148 files changed, 8132 insertions(+), 2808 deletions(-)  create mode 100644 
drivers/gpu/drm/amd/display/dc/dc_memory_pool.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dc_memory_pool.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/inc/hw/rmcm.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/rmcm/Makefile
 create mode 100644 drivers/gpu/drm/amd/display/dc/rmcm/dcn42/dcn42_rmcm.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/rmcm/dcn42/dcn42_rmcm.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/rmcm/dcn60/dcn60_rmcm.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/rmcm/dcn60/dcn60_rmcm.h

--
2.43.0

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