From: Piotr Maziarz <[email protected]> [Why] Hwss executors shouldn't be coupled to complex dc structs such as pipe_ctx. The DPP_PROGRAM_UPSP executor took a whole pipe_ctx only to reach two fields.
[How] Change program_upsp_params to hold the dpp and the dscl_prog_data that dpp_program_upsp() actually needs, and extract them in the generic HWSS layer. Add hwss_add_dpp_program_upsp() so the build site uses a helper with the standard bounds check instead of assigning the step inline. Update the BLS specs. Reviewed-by: Alvin Lee <[email protected]> Signed-off-by: Piotr Maziarz <[email protected]> Signed-off-by: George Zhang <[email protected]> --- .../drm/amd/display/dc/core/dc_hw_sequencer.c | 35 ++++++++++--------- .../drm/amd/display/dc/hwss/hw_sequencer.h | 8 ++++- 2 files changed, 26 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c index 6ed22b2e9c74..b3270f5bb56e 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c @@ -1023,11 +1023,9 @@ void hwss_build_full_sequence(struct dc *dc, if (current_pipe->plane_res.hubp->funcs->hubp_program_mcache_id_and_split_coordinate) hwss_add_hubp_program_mcache_id(&seq_state, current_pipe->plane_res.hubp, ¤t_pipe->mcache_regs); - if (current_pipe->plane_res.dpp->funcs->dpp_program_upsp) { - block_sequence[*num_steps].params.program_upsp_params.pipe_ctx = current_pipe; - block_sequence[*num_steps].func = DPP_PROGRAM_UPSP; - (*num_steps)++; - } + if (current_pipe->plane_res.dpp->funcs->dpp_program_upsp) + hwss_add_dpp_program_upsp(&seq_state, current_pipe->plane_res.dpp, + ¤t_pipe->plane_res.scl_data.dscl_prog_data); } } current_pipe = current_pipe->bottom_pipe; @@ -3009,18 +3007,11 @@ void hwss_program_bias_and_scale(union block_sequence_params *params) void hwss_program_upsp(union block_sequence_params *params) { - struct pipe_ctx *pipe_ctx = params->program_upsp_params.pipe_ctx; - struct dpp *dpp = pipe_ctx->plane_res.dpp; - struct dscl_prog_data *dscl_prog_data = &pipe_ctx->plane_res.scl_data.dscl_prog_data; + struct dpp *dpp = params->program_upsp_params.dpp; + const struct dscl_prog_data *dscl_prog_data = params->program_upsp_params.dscl_prog_data; - if (!dpp || !dscl_prog_data) - return; - - if (dpp && dpp->funcs->dpp_program_upsp) { - // program upsampler - dpp->funcs->dpp_program_upsp(dpp, - dscl_prog_data); - } + if (dpp && dscl_prog_data && dpp->funcs->dpp_program_upsp) + dpp->funcs->dpp_program_upsp(dpp, dscl_prog_data); } void hwss_power_on_mpc_mem_pwr(union block_sequence_params *params) @@ -5737,6 +5728,18 @@ void hwss_add_dpp_set_scaler(struct block_sequence_state *seq_state, } } +void hwss_add_dpp_program_upsp(struct block_sequence_state *seq_state, + struct dpp *dpp, + const struct dscl_prog_data *dscl_prog_data) +{ + if (*seq_state->num_steps < MAX_HWSS_BLOCK_SEQUENCE_SIZE) { + seq_state->steps[*seq_state->num_steps].func = DPP_PROGRAM_UPSP; + seq_state->steps[*seq_state->num_steps].params.program_upsp_params.dpp = dpp; + seq_state->steps[*seq_state->num_steps].params.program_upsp_params.dscl_prog_data = dscl_prog_data; + (*seq_state->num_steps)++; + } +} + void hwss_add_hubp_mem_program_viewport(struct block_sequence_state *seq_state, struct hubp *hubp, const struct rect *viewport, diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h index fc5935b1e8b7..7d4310c0ef3f 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h @@ -54,6 +54,7 @@ struct pg_block_update; struct drr_params; struct dc_underflow_debug_data; struct dsc_optc_config; +struct dscl_prog_data; struct vm_system_aperture_param; struct stream_encoder; struct hpo_dp_stream_encoder; @@ -171,7 +172,8 @@ struct set_output_transfer_func_params { const struct dc_stream_state *stream; }; struct program_upsp_params { - struct pipe_ctx *pipe_ctx; + struct dpp *dpp; + const struct dscl_prog_data *dscl_prog_data; }; struct update_visual_confirm_params { @@ -2628,6 +2630,10 @@ void hwss_add_dpp_set_scaler(struct block_sequence_state *seq_state, struct dpp *dpp, const struct scaler_data *scl_data); +void hwss_add_dpp_program_upsp(struct block_sequence_state *seq_state, + struct dpp *dpp, + const struct dscl_prog_data *dscl_prog_data); + void hwss_add_hubp_mem_program_viewport(struct block_sequence_state *seq_state, struct hubp *hubp, const struct rect *viewport, -- 2.55.0
