From: Karthi Kandasamy <[email protected]> [Why] The forced_psr_active gates added across hwseq skipped backlight, ABM, CRTC/OTG, PHY link output and DPMS teardown whenever seamless switch happens. This meant the link was not fully retrained during an HDR/SDR switch, going beyond the intended scope of just preventing the frozen frame from being disrupted.
[How] Removed the forced_psr_active conditionals from early return, the dpms_on gate, the disable_link_output gates, and the reset_back_end_for_pipe dpms_off/abm/disable_crtc/enable_optc_clock skips and hwseq, restoring their unconditional behavior so full link training runs during the HDR/SDR switch even with seamless switch Reviewed-by: Anthony Koo <[email protected]> Signed-off-by: Karthi Kandasamy <[email protected]> Signed-off-by: Ivan Lipski <[email protected]> --- .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 13 +++--------- .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 19 ++++++----------- .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 17 +++++---------- .../amd/display/dc/hwss/dcn31/dcn31_hwseq.c | 21 ++++++------------- .../amd/display/dc/hwss/dcn314/dcn314_hwseq.c | 8 +++---- .../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 7 ++----- .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 7 ++----- .../amd/display/dc/hwss/dcn60/dcn60_hwseq.c | 4 +--- 8 files changed, 28 insertions(+), 68 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c index 7b3aa02dda63..1abb28504aec 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c @@ -1285,8 +1285,6 @@ void dce110_blank_stream(struct pipe_ctx *pipe_ctx) return; if (link->local_sink && link->local_sink->sink_signal == SIGNAL_TYPE_EDP) { - if (link->forced_psr_active) - return; if (!link->skip_implict_edp_power_control && hws) hws->funcs.edp_backlight_control(link, false); link->dc->hwss.set_abm_immediate_disable(pipe_ctx); @@ -1815,9 +1813,7 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw( dc->link_srv->set_dsc_enable(pipe_ctx, true); } - if (!stream->dpms_off && - !(link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) + if (!stream->dpms_off) dc->link_srv->set_dpms_on(context, pipe_ctx); /* DCN3.1 FPGA Workaround @@ -3607,11 +3603,8 @@ void dce110_disable_link_output(struct dc_link *link, else if (dmcu != NULL && dmcu->funcs->lock_phy) dmcu->funcs->lock_phy(dmcu); - if (!(signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) { - link_hwss->disable_link_output(link, link_res, signal); - link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; - } + link_hwss->disable_link_output(link, link_res, signal); + link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; /* * Add the logic to extract BOTH power up and power down sequences * from enable/disable link output and only call edp panel control diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c index 2ab247d9748b..f1d14b97977f 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c @@ -1350,12 +1350,7 @@ static void dcn10_reset_back_end_for_pipe( * screen only, the dpms_off would be true but * VBIOS lit up eDP, so check link status too. */ - if (link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active) { - /* forced psr is active for seamless switch; skip dpms-off. */ - if (pipe_ctx->stream_res.audio) - dc->hwss.disable_audio_stream(pipe_ctx); - } else if (!pipe_ctx->stream->dpms_off || link->link_status.link_active) + if (!pipe_ctx->stream->dpms_off || link->link_status.link_active) dc->link_srv->set_dpms_off(pipe_ctx); else if (pipe_ctx->stream_res.audio) dc->hwss.disable_audio_stream(pipe_ctx); @@ -1379,15 +1374,13 @@ static void dcn10_reset_back_end_for_pipe( * parent pipe. */ if (pipe_ctx->top_pipe == NULL) { - if (!(link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) { - if (pipe_ctx->stream_res.abm) - dc->hwss.set_abm_immediate_disable(pipe_ctx); - pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); + if (pipe_ctx->stream_res.abm) + dc->hwss.set_abm_immediate_disable(pipe_ctx); - pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); - } + pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); + + pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); set_drr_and_clear_adjust_pending(pipe_ctx, pipe_ctx->stream, NULL); if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) pipe_ctx->stream->link->phy_state.symclk_ref_cnts.otg = 0; diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c index 6b8c5b1e436c..b0cc1f2506ba 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c @@ -2914,12 +2914,7 @@ void dcn20_reset_back_end_for_pipe( * screen only, the dpms_off would be true but * VBIOS lit up eDP, so check link status too. */ - if (link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active) { - /* forced psr is active for seamless switch; skip dpms-off. */ - if (pipe_ctx->stream_res.audio) - dc->hwss.disable_audio_stream(pipe_ctx); - } else if (!pipe_ctx->stream->dpms_off || link->link_status.link_active) + if (!pipe_ctx->stream->dpms_off || link->link_status.link_active) dc->link_srv->set_dpms_off(pipe_ctx); else if (pipe_ctx->stream_res.audio) dc->hwss.disable_audio_stream(pipe_ctx); @@ -2944,14 +2939,12 @@ void dcn20_reset_back_end_for_pipe( * parent pipe. */ if (pipe_ctx->top_pipe == NULL) { - if (!(link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) { - dc->hwss.set_abm_immediate_disable(pipe_ctx); - pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); + dc->hwss.set_abm_immediate_disable(pipe_ctx); - pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); - } + pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); + + pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass) pipe_ctx->stream_res.tg->funcs->set_odm_bypass( pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c index 823ef06c64f5..b6f3c0480ab6 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c @@ -537,11 +537,9 @@ static void dcn31_reset_back_end_for_pipe( } ASSERT(!pipe_ctx->top_pipe); - link = pipe_ctx->stream->link; + dc->hwss.set_abm_immediate_disable(pipe_ctx); - if (!(link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) - dc->hwss.set_abm_immediate_disable(pipe_ctx); + link = pipe_ctx->stream->link; if (dc->hwseq) dc->hwseq->wa_state.skip_blank_stream = false; @@ -557,11 +555,9 @@ static void dcn31_reset_back_end_for_pipe( pipe_ctx->stream_res.tg, OPTC_DSC_DISABLED, 0, 0); - if (!(link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) { - pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); - pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); - } + pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); + + pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); if (pipe_ctx->stream_res.tg->funcs->set_odm_bypass) pipe_ctx->stream_res.tg->funcs->set_odm_bypass( pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); @@ -590,12 +586,7 @@ static void dcn31_reset_back_end_for_pipe( * screen only, the dpms_off would be true but * VBIOS lit up eDP, so check link status too. */ - if (link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active) { - /* forced psr is active for seamless switch; skip dpms-off. */ - if (pipe_ctx->stream_res.audio) - dc->hwss.disable_audio_stream(pipe_ctx); - } else if (!pipe_ctx->stream->dpms_off || link->link_status.link_active) + if (!pipe_ctx->stream->dpms_off || link->link_status.link_active) dc->link_srv->set_dpms_off(pipe_ctx); else if (pipe_ctx->stream_res.audio) dc->hwss.disable_audio_stream(pipe_ctx); diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c index 583007c1fee3..de7dde2b036b 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c @@ -531,11 +531,9 @@ void dcn314_disable_link_output(struct dc_link *link, link->dc->hwss.edp_backlight_control(link, false); else if (dmcu != NULL && dmcu->funcs->lock_phy) dmcu->funcs->lock_phy(dmcu); - if (!(signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) { - link_hwss->disable_link_output(link, link_res, signal); - link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; - } + + link_hwss->disable_link_output(link, link_res, signal); + link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; /* * Add the logic to extract BOTH power up and power down sequences * from enable/disable link output and only call edp panel control diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c index e7bf865755d4..9135b01fe388 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c @@ -1463,11 +1463,8 @@ void dcn32_disable_link_output(struct dc_link *link, else if (dmcu != NULL && dmcu->funcs->lock_phy) dmcu->funcs->lock_phy(dmcu); - if (!(signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) { - link_hwss->disable_link_output(link, link_res, signal); - link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; - } + link_hwss->disable_link_output(link, link_res, signal); + link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; /* * Add the logic to extract BOTH power up and power down sequences * from enable/disable link output and only call edp panel control diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c index fbf4d0f95c5c..aa047b5b4939 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c @@ -1849,11 +1849,8 @@ void dcn35_disable_link_output(struct dc_link *link, disable_link_output_symclk_on_tx_off(link, DP_UNKNOWN_ENCODING); link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; } else { - if (!(signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) { - link_hwss->disable_link_output(link, link_res, signal); - link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; - } + link_hwss->disable_link_output(link, link_res, signal); + link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; } /* * Add the logic to extract BOTH power up and power down sequences diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn60/dcn60_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn60/dcn60_hwseq.c index d515b9cbc934..f8254dfe1ce7 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn60/dcn60_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn60/dcn60_hwseq.c @@ -413,9 +413,7 @@ enum dc_status dcn60_apply_single_controller_ctx_to_hw( dc_is_virtual_signal(pipe_ctx->stream->signal))) dc->link_srv->set_dsc_enable(pipe_ctx, true); } - if (!stream->dpms_off && - !(link->connector_signal == SIGNAL_TYPE_EDP && - link->forced_psr_active)) + if (!stream->dpms_off) dc->link_srv->set_dpms_on(context, pipe_ctx); /* DCN3.1 FPGA Workaround -- 2.43.0
