I got the delays working on the uno r4, but while I was debugging I noticed that the word 0< (ZEROLESS) is actually '0 <= tos'. For ARM it's implemented as
@ ----------------------------------------------------------------------------- CODEWORD "0<", ZEROLESS @ ( n -- ? ) @ ----------------------------------------------------------------------------- movs tos, tos asr tos, #32 @ Turn MSB into 0xffffffff or 0x00000000 NEXT (see https://github.com/mkobetic/amforth/blob/main/arm/words/comparisions.s#L41) The `asr tos, #32` (arithmetic shift right) shifts the sign bit over the entire register, so it does yield 0xffffffff or 0x00000000, but for 0 it yields 0x00000000, so it says that 0< is true for zero. I'm also wondering why is the `movs tos, tos` there, but that's separate from what seems like a bug to me. Am I correct? Do we want to fix this separately from my UNO R4 effort or should I just fix it in my fork for now? Looking at the RISC-V version it seems it may have the same issue # ----------------------------------------------------------------------------- CODEWORD "0<", ZEROLESS # ( n -- ? ) # ----------------------------------------------------------------------------- srai x3, x3, 31 NEXT Cheers, Martin _______________________________________________ Amforth-devel mailing list for http://amforth.sf.net/ [email protected] https://lists.sourceforge.net/lists/listinfo/amforth-devel
