It's the holiday season. So be nice.
There currently exist 2 execute variants. The old base+displacement and the new
relative. Now that we have 64 bit registers, why not have an RR instruction
where the first register the modifying value but the second register contains
the actual instruction to be executed. I have no idea how the hardware actually
works internally, so perhaps this would be a huge kludge. But, then, at present
the EX instruction must copy the referenced instruction "somewhere" and modify
it "somehow". So why couldn't it copy from a register as well as from the
D-cache? Or, maybe, how about an EX which works like EXRL but the relative
instruction is "hard coded" to be the next instruction in line? The problem, of
course, is that this new EX would then need to "skip over" the just executed
instruction. And I don't know how to handle "interruptible" instructions. But
EX can do it, so I guess the same way.
Yes, I realize these are likely not of much importance. It's just that there's
nothing going on and for the rest of the year we are in "don't do anything"
mode so that month-end, quarter-end, and year-end processing will be smooth.
OK, since I have you here anyway. What about a real weirdie? An instruction
which says whether or not to execute the next instruction, based on the
condition code? That would enable every instruction to be a conditional
instruction. Perhaps EXNC (Execute Next Conditional). What comes to mind?
Perhaps:
SLR R2,R2
LTR R1,R1
EXNC NZ
L R2,0(,R1)
LTR R2,R2
JZ BADADDR
Which would load the contents of R2 with the address contained in R1 unless it
was zero. Or maybe (combining both of the above)
L R1,LEN LENGTH OF FIELD
AHI R1,-1 DECREMENT FOR EX
EXNZ
EXRI R1 EX NEXT INSTRUCTION
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IT
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