IILF with an immediate value less than 65536 does what you want, and would be 
my choice.

Robert Ngan
CeleritiFinTech

-----Original Message-----
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of John P. Hartmann
Sent: Wednesday, January 20, 2016 1:54 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: load logical halfword immediate

   sr x,x
   icm x,3, address

On 01/20/2016 08:21 PM, Swarbrick, Frank wrote:
> Is there any such instruction?  This would be an instruction that would:
>
> -          Be a register-and-immediate instruction, with a halfword immediate 
> value as the source.
>
> -          Load the halfword in bytes 48-63.
>
> -          Load zeroes in bytes 32-47.
>
> -          Leave bytes 1-31 unchanged.
>
> I can't find anything that will do exactly this.
> Why do I want to do exactly this?  I "just do", and it bugs me I can't find a 
> single instruction to do it.
>
> I don't want LLILL because it sets bytes 1-47 to zero.
> I don't want IILL because it does not set 32-47 to zeroes (yes, I could 
> follow the IILL with IILH Rx,0).
> I don't want IILF because it uses a fullword immediate value instead of a 
> halfword immediate value.
> I don't want LHI because it sign extends.
> LA could almost be used, except it allows a value of "3/4s of a halfword".
> LLH does exactly what I want, except that it's register-and-storage, not 
> register-and-immediate.
>
> In the end is it really a big deal?  No; but I'm obsessing about it, thinking 
> I'm just overlooking it.  Probably I'll use either LLILL or IILF, depending 
> on if I really care about bits 1-31 (which I don't really...).
>
> Thanks for putting up with this perhaps silly inquiry!
>
> Frank


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