Specifically, the vector instructions allow you to do various operations in parallel on data contained in a pair of quadword vector registers. There are also VECTOR LOAD MULTIPLE and VECTOR STORE MULTIPLE instuctions
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List [[email protected]] on behalf of Ze'ev Atlas [[email protected]] Sent: Saturday, June 6, 2020 10:30 PM To: [email protected] Subject: Re: Does the z architecture have something like the SIMD instructions Hi allI followed some advice her and yes, IBM has a pretty advanced SIMD architecture from z13 onward. I am not sure about previous attempts, but the current architecture seems to be pretty advanced. BTW IBM claims that with 'arch(12)' COBOL. PL/I, C, Java will use that facility at least partially see https://secure-web.cisco.com/18_tFg2_bubJGOnaMW7qnEwx4DBh_oCaBAsuhgiTGeA7fYHgo7YbyKOze-qOysUyaLLxZs6Bl8mhHkNSggpmJtS4VY9wa_dkIJr_0F_BE4CAUYKlq1pPTz2LsSXQq0rrs9kH8KSrLADzzQv-RP_WrZ8I6WAjAyVuV3NqiB5YMgWy0yVIi3Aptyg3bnYEafKecYhqYBOkHr5VTIcniQAsX6sow6t6JOiY2eIsNzvmkQvE9mIN3bk1NOZptY9mCW4bQFD2rGWdgioNvc6mrKn-g-7Cfr7D0_rT3lT8vLhfk3bthbXDvOxn1_RlNHWo9UBK82m1lReoaX3zsEjqpDsgcXlLWU1VjnQ3dsCVyx388VHrLLkcaC_NEiEPSOk2uT5M_BJNoXg0X8igqsqOPvVrr6UAP2z2g1mEWORWWGIP1qez-birIt9GLcPUGrfV_E5so/https%3A%2F%2Fibmsystemsmag.com%2FIBM-Z%2F01%2F2018%2Fvector-facility-z14 Ze'ev Atlas
