Nope -- display to hex, i.e. c'1234' to x'1234'

-----Original Message-----
From: IBM Mainframe Assembler List [mailto:[email protected]]
On Behalf Of Seymour J Metz
Sent: 08 June 2020 12:41
To: [email protected]
Subject: Re: Does the z architecture have something like the SIMD
instructions

I might believe hex to binary, with the 16 symbols in an 8 bit encoding.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Assembler List [[email protected]] on
behalf of Pieter Wiid [[email protected]]
Sent: Monday, June 8, 2020 2:33 AM
To: [email protected]
Subject: Re: Does the z architecture have something like the SIMD
instructions

I did create a macro to build the table -- and one for TRTO, to convert
display to hex.

-----Original Message-----
From: IBM Mainframe Assembler List [mailto:[email protected]]
On Behalf Of Seymour J Metz
Sent: 07 June 2020 23:05
To: [email protected]
Subject: Re: Does the z architecture have something like the SIMD
instructions

Well, any set of 16 symbols encoded in 8 bits; it doesn't work so well with,
e.g., Unicode. My intent for PoOps was to illustrate that UNPK is not just a
decimal instruction.

As for TROT, it would depend on whether the degree of use justified the
larger translate table. If I went that way I would be tempted to write a
macro to generate a table, although it isn't that hard with a decent editor,
e.g., ISPF, SECIT.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Assembler List [[email protected]] on
behalf of Pieter Wiid [[email protected]]
Sent: Sunday, June 7, 2020 1:39 PM
To: [email protected]
Subject: Re: Does the z architecture have something like the SIMD
instructions

Do you mean conversion to printable hex, e.g. convert x'1234' to
x'f1f2f3f4'? These days, I use the TROT instruction.

-----Original Message-----
From: IBM Mainframe Assembler List [mailto:[email protected]]
On Behalf Of Seymour J Metz
Sent: 07 June 2020 19:21
To: [email protected]
Subject: Re: Does the z architecture have something like the SIMD
instructions

I thought that the descriptions of the vector instructions were a much
easier read than the, e.g., sort, transaction, instructions.

Something that I'd like to see inPoOps is an example of using UNPK and TR to
convert binary to hexadecimal.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Assembler List [[email protected]] on
behalf of Farley, Peter x23353 [[email protected]]
Sent: Sunday, June 7, 2020 12:23 PM
To: [email protected]
Subject: Re: Does the z architecture have something like the SIMD
instructions

Ed,

Is there any chance you could provide (maybe eventually in a SHARE session
presentation?) a set of good examples of using the vector instructions as
you say you do?

Or am I late to the party and there have already been such SHARE sessions
that I missed?

If I have one particular beef with the PoOPS writing team it is that there
are significant sets of instructions with no usage examples, z13+ vector
instructions being only just the latest.

Peter

-----Original Message-----
From: IBM Mainframe Assembler List <[email protected]> On
Behalf Of Ed Jaffe
Sent: Sunday, June 7, 2020 10:48 AM
To: [email protected]
Subject: Re: Does the z architecture have something like the SIMD
instructions

On 6/7/2020 7:11 AM, Peter Relson wrote:
> That limitation is not the case for z/Architecture vector operations.
> </snip>
>
> I erred in writing that. Shmuel was of course correct. The "vector
> register" is 128 bits (one quadword).
> The extent of the "vectorization" depends on the size of the operands.


We use SIMD *heavily* for character-based operations and the speed is
incredible!

Doing 16 operations at once sure is preferable to doing just one! ijs... ;-)


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