Here is another possibility that uses instructions which have been
available since the publication of the original z/Architecture
Principles of Operation in December 2000. It is only one
instruction longer (and four instruction bytes longer) than the
scheme offered by Dan Greiner, although not as nifty!
Bob
LLGC R0,BYTE Low order byte of R0
* contains byte of interest.
*
* Bits 56-59 contain the two
* adjacent bit pairs of
* interest.
*
* Bits 60-63 are of no
* interest.
*
* Bits 0-55 are zero.
*
SRL R0,4(0) Bits 60-63 of R0 contain
* the pair of two bits of
* interest. Bits 0-59 are
* zero.
*
SRLG R1,R0,2(0) R1 contains the first pair
* of bits of interest in bits
* 62-63. Bits 0-61 are zero.
*
NILL R0,B'11' R0 contains the second pair
* of bits of interest in bits
* 62-63. Bits 0-61 are zero.
*
AHI R0,C'1' * Convert the bit pairs to
AHI R1,C'1' * Zoned Decimal format,
* * origined at 1.
