"IBM Mainframe Assembler List" <[email protected]> wrote on
02/05/2022 08:25:37 AM:
> The lowest-tech approach using only two regs (no 64-bit regs, no z/Arch
> instructions, no 6-byte instructions even) that came to mind was this:
>
> ICM 0,B'1000',BYTE Put the byte into bits 0-7
> SRDL 0,30 Move BYTE.0-1 to reg 0.30-31,
> * zeroing reg 0.0-29
> * BYTE.2-3 to reg 1.0-1
> SRL 1,30 Move BYTE.2-3 to reg 1.30-31,
> * zeroing reg 1.0-29
> AHI 0,C'1' 0-3 => C'1'-C'4'
> AHI 1,C'1'
> STC 0,target0
> STC 1,target1
> BYTE DS X
>
> I.e., taking advantage of needing to do a shift anyway to avoid having
to
> clear anything.
I like that one and it is easy to understand what it is doing. I
will keep that one. Thanks.
Sincerely,
Dave Clark
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