----- Original Message -----
From: "Paul Gilmartin" <00000014e0e4a59b-dmarc-requ...@listserv.uga.edu>
To: <ASSEMBLER-LIST@LISTSERV.UGA.EDU>
Sent: Saturday, April 30, 2022 6:34 AM
Subject: Re: Unsigned 64-bit numbers
On Apr 29, 2022, at 14:07:58, Robin Vowels wrote:
On 2022-04-30 05:10, Paul Gilmartin wrote:
...
That's exactly what the LCR instruction does.
No it doesn't. RTM. The value in the register is unchanged
in this case.
"RTM" doesn't tell me. The hardware could do any of:
o Complement every bit and add 1.
o Detect x'80000000' and do nothing.
RTM. The POP manual says:
"An overflow condition occurs when the maximum negative
"number is complemented; the number remains unchanged."
o Subtract from a hardwired 0.
Did you know that to subtract from zero, the hardware complements the second
operand and adds 1, and then adds to zero?
RTM. LCR certainly does not do that.
o ...
The result is thee same in each case. The first is
probably the simplest and cheapest since the hardware
exists to handle the general case. It may be the
fastest unless it causes pipelining to reserve a
register. The PoOps specifies only the result of
each instruction;
RTM. The POP specifies what the instruction does.
Carefully read, for example, what EDMK does.
the implementation detail is moot.
Unless you have privileged knowledge of the hardware
implementation you are not entitled to advocate for
or against any of the possibilities with equivalent
outcomes.
RTM. It is clear what the instruction does.
Incidentally, I have been familiar with hardware implentations
of complementing for several decades.
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