*Sigh*
"Baseless code" is a phrase that has caused considerable confusion.
For the vast majority of situations, base registers are not needed to address
code.
The one situation that I am aware of is the case of the indexed branch.
However, data is always accessed using a base register.
Modern processors use a 256-byte cache line, with separate caches for
instructions
and data. A cache line maps to 256 bytes of storage on a 256-byte boundary.
There are performance penalties when the same line of storage needs to be in
both the instruction cache and the data cache.
It has nothing to do with the base register used.
As to solutions for data, look up the LOCTR assembler instruction. You can code:
MYCSECT CSECT
J START ,
DATA LOCTR , establish a location counter for data
DC CL8'MYCSECT'
* other constants used to form eyecatchers for the module
CODE LOCTR , establish a location counter for code
STM 14,12,12(13) save caller's registers
LARL 10,MYCSECT establish a base register
USING MYCSECT,10 tell the assembler
* more code
DATA LOCTR , resume the location counter for the data
* any desired data constants
LTORG ,
CODE LOCTR , Resume the location counter for code
* more code
DATA LOCTR , Resume the data location counter
LTORG , More literals
CODE LOCTR , resume the code location counter
* etc
This establishes three location counters used by the program.
The first is unnamed, and is used only for the first instruction. Code
assembled using the first location counter will be assembled at the
lowest addresses in the program
The second location counter is for constants, and will be at the next
addresses after the unnamed location counter.
The third location counter is for instructions, and will start after the
last field defined under the DATA location counter.
This way, the assembler will group all your cvonstants near the beginning of
the program, and they will all be addressable in this example using register 10.
--
Tom Marchant
On Tue, 21 Nov 2023 15:35:51 -0500, Dave Clark <[email protected]> wrote:
> I like to have all my variable data covered by R13, too. However,
>this does mean I have to have separate coverage for hard-coded and LTORG
>constants. A base register would handle it, but then there is base-less
>programming to think of. I've also heard that there is some caching issue
>with having data using the same base register as code -- or some such. Are
>there other solutions for hard-coded and LTORG constants?