If the PSW points to the resumed instruction, the RP is not relevant. The exception has occurred when attempting to execute the resumed instruction, so it may relate to processing that instruction (if IEP is active) or to the operands on that instruction. If you mean the PSW points to the start of the resumed instruction, then if the related interrupt code for the 0C4 is 4, a protection exception, and the storage it is fetchable, then an IEP exception seems likely, but if the interrupt code is a translation exception, that probably relates to the instruction operands. (There are various additional cases possible if the instruction crosses a page boundary, but that seems unlikely).
Sorry, I don't off hand know how to check for IEP in IPCS. Jonathan Scott -----Original Message----- From: IBM Mainframe Assembler List <[email protected]> On Behalf Of Robert Crawford Sent: 20 October 2025 18:01 To: [email protected] Subject: Re: Resume Program (RP) The ABEND'ing PSW points to the resumed instruction. I got the RP address from the BEAR. The resumed instruction is also in key 8 and fetchable. Do you know I can check for IEP in IPCS? It seems like it should be available somehow.
