The TM instruction only tests Those bits tat have a 1 in the field. With a mask of C4 it is testing bits 0, 1 and 5; it is not testing bit 7. That's why it gets the same CC for C4, C5, C6 and C7.
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 עַם יִשְׂרָאֵל חַי נֵ֣צַח יִשְׂרָאֵ֔ל לֹ֥א יְשַׁקֵּ֖ר ________________________________________ From: IBM Mainframe Assembler List <[email protected]> on behalf of David Clark <[email protected]> Sent: Monday, February 16, 2026 2:45 PM To: [email protected] <[email protected]> Subject: Apparent Test Under Mask Failure External Message: Use Caution Can someone please explain to me how the following fails to drop through to the actual test for C5? The request at d'8000' is 'E' (x'C5', b'11000101') but the code is taking the 'D' (x'C4', b'11000100') branch. Why? The condition code should result in mixed -- not ones. Am I going to have to change from bit mask testing to 'CLI' testing? 000872 91C4 8000 00000 1842+ TM REQU_DELETE,L'REQU_DELETE 000876 A714 0124 00ABE 1843+ JO TXTDLET ...snip... 0008C2 91C5 8000 00000 1994+ TM REQU_2EBCDIC,L'REQU_2EBCDIC 0008C6 A714 02D7 00E74 1995+ JO TXT2EBC The bit mask flags are defined as follows--using my own macros based on the late Dr. John Ehrman's SHARE presentation on the subject. 000000 300=TXTREQU DS CL1 00000 000C4 308+REQU_DELETE EQU *-1,C'D' 00000 000C5 310+REQU_2EBCDIC EQU *-1,C'E' ...snip... Sincerely, Dave Clark
