Signed-off-by: Alexander Shiyan <[email protected]>
---
arch/arm/mach-clps711x/Kconfig | 13 +++++++++++++
arch/arm/mach-clps711x/lowlevel.c | 4 ++--
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index f0adeda..d2873b4 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -10,6 +10,19 @@ config MACH_CLEP7212
endchoice
+menu "CLPS711X specific settings"
+
+config CLPS711X_CPU_PLL_MULT
+ int "CPU PLL multiplier (20-50)"
+ range 20 50
+ default "40"
+ help
+ Define CPU PLL multiplier. PLL is calculated by formula:
+ PLL Frequency = (PLL Multiplier / 2) * 3686400 Hz
+ Default value is 40, for achieve 73 MHz.
+
+endmenu
+
config BOARDINFO
default "Cirrus Logic CLEP7212" if MACH_CLEP7212
diff --git a/arch/arm/mach-clps711x/lowlevel.c
b/arch/arm/mach-clps711x/lowlevel.c
index 0249c60..245ac93 100644
--- a/arch/arm/mach-clps711x/lowlevel.c
+++ b/arch/arm/mach-clps711x/lowlevel.c
@@ -18,10 +18,10 @@
#include <mach/clps711x.h>
#define MAIN_CLOCK 3686400
-#define CPU_SPEED 92160000
+#define CPU_SPEED ((CONFIG_CLPS711X_CPU_PLL_MULT * MAIN_CLOCK) /
2)
#define BUS_SPEED (CPU_SPEED / 2)
-#define PLL_VALUE (((CPU_SPEED * 2) / MAIN_CLOCK) << 24)
+#define PLL_VALUE (CONFIG_CLPS711X_CPU_PLL_MULT << 24)
#define SDRAM_REFRESH_RATE (64 * (BUS_SPEED / (8192 * 1000)))
void __naked __bare_init barebox_arm_reset_vector(void)
--
1.7.3.4
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