On Fri, Feb 08, 2013 at 02:02:13PM +0400, Alexander Shiyan wrote:
> One lowlevel initialization will be used on any CLPS711X-target,
> so move it in the common location.
>
> Signed-off-by: Alexander Shiyan <[email protected]>
> ---
> arch/arm/boards/clep7212/Makefile | 3 +-
> arch/arm/boards/clep7212/lowlevel.c | 57
> -----------------------------------
> arch/arm/mach-clps711x/Makefile | 3 +-
> arch/arm/mach-clps711x/lowlevel.c | 57
> +++++++++++++++++++++++++++++++++++
> 4 files changed, 60 insertions(+), 60 deletions(-)
> delete mode 100644 arch/arm/boards/clep7212/lowlevel.c
> create mode 100644 arch/arm/mach-clps711x/lowlevel.c
>
> diff --git a/arch/arm/boards/clep7212/Makefile
> b/arch/arm/boards/clep7212/Makefile
> index a63aeae..676e867 100644
> --- a/arch/arm/boards/clep7212/Makefile
> +++ b/arch/arm/boards/clep7212/Makefile
> @@ -1,2 +1 @@
> -obj-y += lowlevel.o clep7212.o
> -pbl-y += lowlevel.o
> +obj-y += clep7212.o
> diff --git a/arch/arm/boards/clep7212/lowlevel.c
> b/arch/arm/boards/clep7212/lowlevel.c
I think it's better to keep the reset vector in board specific code.
Then you can have a board specific reset vector, which simply calls
a SoC specific one. This also solves the Kconfig problem with the
PLL setup. So you would have this in your board:
void __naked __bare_init barebox_arm_reset_vector(void)
{
arm_cpu_lowlevel_init();
clps711x_barebox_entry();
}
You could add different more specific clps711x_* functions which will
result in different CPU speeds, or you could pass a PLL value to the
entry function, if that better fits your needs.
The rest of this series looks fine.
Sascha
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