On Fri, Aug 28, 2015 at 01:24:04AM +0300, Antony Pavlov wrote: > N.B. phys_to_virt() translates phys address > to KSEG1 (uncached) address as barebox mips > has no cache support.
What would it take to implement cache support for mips? The u-boot mips cache code seems quite straight forward. With cache support you could use several drivers as they are and wouldn't have to introduce physical/virtual translations. I'm afraid these translations will be broken quite soon as they get tested only on Mips. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
