Port of a Linux commit c2deae44616dab0112d965a0dc72d053b5727b4b

  The subordinate value indicates the highest bus number which can be
  reached downstream though a certain device.

  Commit a20c7f36bd3d ("PCI: Do not allocate more buses than available in
  parent")
  ensures that downstream devices cannot assign busnumbers higher than the
  upstream device subordinate number, which was indeed illogical.

  By default, dw_pcie_setup_rc() inits the Root Complex subordinate to a
  value of 0x01.

  Due to this combined with above commit, enumeration stops digging deeper
  downstream as soon as bus num 0x01 has been assigned, which is always
  the case for a bridge device.

  This results in all devices behind a bridge bus to remain undetected, as
  these would be connected to bus 0x02 or higher.

  Fix this by initializing the RC to a subordinate value of 0xff, which is
  not altering hardware behaviour in any way, but informs probing
  function pci_scan_bridge() later on which reads this value back from
  register.

  Following nasty errors during boot are also fixed by this:

  [    0.459145] pci_bus 0000:02: busn_res: can not insert [bus 02-ff]
  under [bus 01] (conflicts with (null) [bus 01])
  ...
  [    0.464515] pci_bus 0000:03: [bus 03] partially hidden behind bridge
  0000:01 [bus 01]
  ...
  [    0.464892] pci_bus 0000:04: [bus 04] partially hidden behind bridge
  0000:01 [bus 01]
  ...
  [    0.466488] pci_bus 0000:05: [bus 05] partially hidden behind bridge
  0000:01 [bus 01]
  [    0.466506] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to
  05
  [    0.466517] pci_bus 0000:02: busn_res: can not insert [bus 02-05]
  under [bus 01] (conflicts with (null) [bus 01])
  [    0.466534] pci_bus 0000:02: [bus 02-05] partially hidden behind
  bridge 0000:01 [bus 01]

  Fixes: a20c7f36bd3d ("PCI: Do not allocate more buses than available in
  parent")
  Tested-by: Niklas Cassel <[email protected]>
  Tested-by: Fabio Estevam <[email protected]>
  Tested-by: Sebastian Reichel <[email protected]>
  Signed-off-by: Koen Vandeputte <[email protected]>
  Signed-off-by: Lorenzo Pieralisi <[email protected]>
  Reviewed-by: Mika Westerberg <[email protected]>
  Acked-by: Lucas Stach <[email protected]>
  Cc: <[email protected]> # 4.15
  Cc: Binghui Wang <[email protected]>
  Cc: Bjorn Helgaas <[email protected]>
  Cc: Jesper Nilsson <[email protected]>
  Cc: Jianguo Sun <[email protected]>
  Cc: Jingoo Han <[email protected]>
  Cc: Kishon Vijay Abraham I <[email protected]>
  Cc: Lorenzo Pieralisi <[email protected]>
  Cc: Lucas Stach <[email protected]>
  Cc: Mika Westerberg <[email protected]>
  Cc: Minghuan Lian <[email protected]>
  Cc: Mingkai Hu <[email protected]>
  Cc: Murali Karicheri <[email protected]>
  Cc: Pratyush Anand <[email protected]>
  Cc: Richard Zhu <[email protected]>
  Cc: Roy Zang <[email protected]>
  Cc: Shawn Guo <[email protected]>
  Cc: Stanimir Varbanov <[email protected]>
  Cc: Thomas Petazzoni <[email protected]>
  Cc: Xiaowei Song <[email protected]>
  Cc: Zhou Wang <[email protected]>

Signed-off-by: Andrey Smirnov <[email protected]>
---
 drivers/pci/pcie-designware-host.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pcie-designware-host.c 
b/drivers/pci/pcie-designware-host.c
index 27d574da6..390960ab8 100644
--- a/drivers/pci/pcie-designware-host.c
+++ b/drivers/pci/pcie-designware-host.c
@@ -361,7 +361,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
        /* Setup bus numbers */
        val = dw_pcie_readl_dbi(pci, PCI_PRIMARY_BUS);
        val &= 0xff000000;
-       val |= 0x00010100;
+       val |= 0x00ff0100;
        dw_pcie_writel_dbi(pci, PCI_PRIMARY_BUS, val);
 
        /* Setup command register */
-- 
2.19.1


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