Port of a Linux commit 314fc854f50317931fb4dfaab431695ab886e8de

  No functional change. Fix all checkpatch warnings and check errors in
  pcie-designware.c

  Signed-off-by: Kishon Vijay Abraham I <[email protected]>
  Signed-off-by: Bjorn Helgaas <[email protected]>
  Acked-By: Joao Pinto <[email protected]>

Signed-off-by: Andrey Smirnov <[email protected]>
---
 drivers/pci/pcie-designware.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c
index bffbc83bc..d95b8aed8 100644
--- a/drivers/pci/pcie-designware.c
+++ b/drivers/pci/pcie-designware.c
@@ -39,13 +39,13 @@ int dw_pcie_read(void __iomem *addr, int size, u32 *val)
                return PCIBIOS_BAD_REGISTER_NUMBER;
        }
 
-       if (size == 4)
+       if (size == 4) {
                *val = readl(addr);
-       else if (size == 2)
+       } else if (size == 2) {
                *val = readw(addr);
-       else if (size == 1)
+       } else if (size == 1) {
                *val = readb(addr);
-       else {
+       } else {
                *val = 0;
                return PCIBIOS_BAD_REGISTER_NUMBER;
        }
@@ -211,8 +211,8 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 
        cfg_res = dev_get_resource_by_name(dev, IORESOURCE_MEM, "config");
        if (cfg_res) {
-               pp->cfg0_size = resource_size(cfg_res)/2;
-               pp->cfg1_size = resource_size(cfg_res)/2;
+               pp->cfg0_size = resource_size(cfg_res) / 2;
+               pp->cfg1_size = resource_size(cfg_res) / 2;
                pp->cfg0_base = cfg_res->start;
                pp->cfg1_base = cfg_res->start + pp->cfg0_size;
 
@@ -259,8 +259,8 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
                }
                if (restype == 0) {
                        of_pci_range_to_resource(&range, np, &pp->cfg);
-                       pp->cfg0_size = resource_size(&pp->cfg)/2;
-                       pp->cfg1_size = resource_size(&pp->cfg)/2;
+                       pp->cfg0_size = resource_size(&pp->cfg) / 2;
+                       pp->cfg1_size = resource_size(&pp->cfg) / 2;
                        pp->cfg0_base = pp->cfg.start;
                        pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
 
@@ -302,7 +302,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
 }
 
 static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
-               u32 devfn, int where, int size, u32 *val)
+                                u32 devfn, int where, int size, u32 *val)
 {
        int ret, type;
        u32 address, busdev, cfg_size;
@@ -343,7 +343,7 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, 
struct pci_bus *bus,
 }
 
 static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,
-               u32 devfn, int where, int size, u32 val)
+                                u32 devfn, int where, int size, u32 val)
 {
        int ret, type;
        u32 busdev, cfg_size;
@@ -408,7 +408,7 @@ static int dw_pcie_valid_device(struct pcie_port *pp, 
struct pci_bus *bus,
 }
 
 static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
-                       int size, u32 *val)
+                          int size, u32 *val)
 {
        struct pcie_port *pp = host_to_pcie(bus->host);
        int ret;
@@ -433,7 +433,7 @@ static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, 
int where,
 }
 
 static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
-                       int where, int size, u32 val)
+                          int where, int size, u32 val)
 {
        struct pcie_port *pp = host_to_pcie(bus->host);
        int ret;
-- 
2.19.1


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