We currently support higher speed modes only for eMMC, not SD, but to
simplify porting drivers, let's add the capability bits into the header.
Signed-off-by: Ahmad Fatoum <a.fat...@pengutronix.de>
---
drivers/mci/am654-sdhci.c | 6 ------
include/mci.h | 8 ++++++++
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/mci/am654-sdhci.c b/drivers/mci/am654-sdhci.c
index a378e3d53c91..20dd03b83a9a 100644
--- a/drivers/mci/am654-sdhci.c
+++ b/drivers/mci/am654-sdhci.c
@@ -83,12 +83,6 @@
#define AM654_SDHCI_MIN_FREQ 400000
#define CLOCK_TOO_SLOW_HZ 50000000
-#define MMC_CAP_UHS_SDR104 0
-#define MMC_CAP_UHS_SDR12 0
-#define MMC_CAP_UHS_DDR50 0
-#define MMC_CAP_UHS_SDR25 0
-#define MMC_CAP_UHS_SDR50 0
-
struct timing_data {
const char *otap_binding;
const char *itap_binding;
diff --git a/include/mci.h b/include/mci.h
index 7ee2e4faa90c..bb168ca2225f 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -58,6 +58,14 @@
#define MMC_CAP_MMC_1_2V_DDR (1 << 9) /* Host supports eMMC
DDR 1.2V */
#define MMC_CAP_DDR (MMC_CAP_MMC_3_3V_DDR |
MMC_CAP_MMC_1_8V_DDR | \
MMC_CAP_MMC_1_2V_DDR)
+#define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode
*/
+#define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode
*/
+#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode
*/
+#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104
mode */
+#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode
*/
+#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
+ MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
+ MMC_CAP_UHS_DDR50)
/* Mask of all caps for bus width */
#define MMC_CAP_BIT_DATA_MASK (MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA)
--
2.39.5
