Linux names these parameters without listing MMC twice in the macro.
Follow suit in barebox to make porting a tiny bit easier.

Signed-off-by: Ahmad Fatoum <a.fat...@pengutronix.de>
---
 drivers/mci/imx-esdhc.c    |  2 +-
 drivers/mci/mci-core.c     | 10 +++++-----
 drivers/mci/stm32_sdmmc2.c |  4 ++--
 include/mci.h              | 10 +++++-----
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index ebc7ed539da9..923dae9cf3b0 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -324,7 +324,7 @@ static int fsl_esdhc_probe(struct device *dev)
                goto err_clk_disable;
 
        if (esdhc_is_usdhc(host) || esdhc_is_layerscape(host))
-               mci->host_caps |= MMC_CAP_MMC_3_3V_DDR | MMC_CAP_MMC_1_8V_DDR;
+               mci->host_caps |= MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR;
 
        rate = clk_get_rate(host->clk);
        host->mci.f_min = rate >> 12;
diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c
index bb345dc5454e..3162a7a36bba 100644
--- a/drivers/mci/mci-core.c
+++ b/drivers/mci/mci-core.c
@@ -791,7 +791,7 @@ static int mmc_change_freq(struct mci *mci)
                mci->card_caps |= MMC_CAP_MMC_HIGHSPEED_52MHZ;
 
                if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
-                       mci->card_caps |= MMC_CAP_MMC_3_3V_DDR | 
MMC_CAP_MMC_1_8V_DDR;
+                       mci->card_caps |= MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR;
        }
 
        if (IS_ENABLED(CONFIG_MCI_MMC_BOOT_PARTITIONS) &&
@@ -1563,7 +1563,7 @@ static int mci_mmc_select_hs_ddr(struct mci *mci)
         * higher speed modes that require voltage switching like HS200/HS400,
         * let's just check for either bit.
         */
-       if (!(mci_caps(mci) & (MMC_CAP_MMC_1_8V_DDR | MMC_CAP_MMC_3_3V_DDR)))
+       if (!(mci_caps(mci) & (MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR)))
                return 0;
 
        ret = mci_mmc_try_bus_width(mci, host->ios.bus_width, 
MMC_TIMING_MMC_DDR52);
@@ -2340,9 +2340,9 @@ static void mci_print_caps(unsigned caps)
                caps & MMC_CAP_SD_HIGHSPEED ? "sd-hs " : "",
                caps & MMC_CAP_MMC_HIGHSPEED ? "mmc-hs " : "",
                caps & MMC_CAP_MMC_HIGHSPEED_52MHZ ? "mmc-52MHz " : "",
-               caps & MMC_CAP_MMC_3_3V_DDR ? "ddr-3.3v " : "",
-               caps & MMC_CAP_MMC_1_8V_DDR ? "ddr-1.8v " : "",
-               caps & MMC_CAP_MMC_1_2V_DDR ? "ddr-1.2v " : "");
+               caps & MMC_CAP_3_3V_DDR ? "ddr-3.3v " : "",
+               caps & MMC_CAP_1_8V_DDR ? "ddr-1.8v " : "",
+               caps & MMC_CAP_1_2V_DDR ? "ddr-1.2v " : "");
 }
 
 /*
diff --git a/drivers/mci/stm32_sdmmc2.c b/drivers/mci/stm32_sdmmc2.c
index b517ab7964e2..8aeda6e988b1 100644
--- a/drivers/mci/stm32_sdmmc2.c
+++ b/drivers/mci/stm32_sdmmc2.c
@@ -637,9 +637,9 @@ static int stm32_sdmmc2_probe(struct amba_device *adev,
                mci->host_caps |= MMC_CAP_MMC_HIGHSPEED_52MHZ;
 
        if (of_property_read_bool(np, "mmc-ddr-3_3v"))
-               mci->host_caps |= MMC_CAP_MMC_3_3V_DDR;
+               mci->host_caps |= MMC_CAP_3_3V_DDR;
        if (of_property_read_bool(np, "mmc-ddr-1_8v"))
-               mci->host_caps |= MMC_CAP_MMC_1_8V_DDR;
+               mci->host_caps |= MMC_CAP_1_8V_DDR;
 
        return mci_register(&priv->mci);
 
diff --git a/include/mci.h b/include/mci.h
index bb168ca2225f..126d3fe52d37 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -53,11 +53,11 @@
 #define MMC_CAP_SD_HIGHSPEED           (1 << 3)
 #define MMC_CAP_MMC_HIGHSPEED          (1 << 4)
 #define MMC_CAP_MMC_HIGHSPEED_52MHZ    (1 << 5)
-#define MMC_CAP_MMC_3_3V_DDR           (1 << 7)        /* Host supports eMMC 
DDR 3.3V */
-#define MMC_CAP_MMC_1_8V_DDR           (1 << 8)        /* Host supports eMMC 
DDR 1.8V */
-#define MMC_CAP_MMC_1_2V_DDR           (1 << 9)        /* Host supports eMMC 
DDR 1.2V */
-#define MMC_CAP_DDR                    (MMC_CAP_MMC_3_3V_DDR | 
MMC_CAP_MMC_1_8V_DDR | \
-                                        MMC_CAP_MMC_1_2V_DDR)
+#define MMC_CAP_3_3V_DDR               (1 << 7)        /* Host supports eMMC 
DDR 3.3V */
+#define MMC_CAP_1_8V_DDR               (1 << 8)        /* Host supports eMMC 
DDR 1.8V */
+#define MMC_CAP_1_2V_DDR               (1 << 9)        /* Host supports eMMC 
DDR 1.2V */
+#define MMC_CAP_DDR                    (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
+                                        MMC_CAP_1_2V_DDR)
 #define MMC_CAP_UHS_SDR12      (1 << 16)       /* Host supports UHS SDR12 mode 
*/
 #define MMC_CAP_UHS_SDR25      (1 << 17)       /* Host supports UHS SDR25 mode 
*/
 #define MMC_CAP_UHS_SDR50      (1 << 18)       /* Host supports UHS SDR50 mode 
*/
-- 
2.39.5


Reply via email to