As for other Rockchip SoCs, give barebox a handle for the DMC and
set the big cluster clock rates to normal defaults.
Signed-off-by: David Jander <da...@protonic.nl>
---
arch/arm/dts/rk3576.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
create mode 100644 arch/arm/dts/rk3576.dtsi
diff --git a/arch/arm/dts/rk3576.dtsi b/arch/arm/dts/rk3576.dtsi
new file mode 100644
index 0000000000..cf7c69b3b5
--- /dev/null
+++ b/arch/arm/dts/rk3576.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/ {
+ dmc: memory-controller {
+ compatible = "rockchip,rk3576-dmc";
+ rockchip,pmu = <&pmu1_grf>;
+ };
+};
+
+&scmi_clk {
+ assigned-clocks = <&scmi_clk SCMI_ARMCLK_B>;
+ assigned-clock-rates = <816000000>, <816000000>;
+};
--
2.47.2
