From: Philipp Zabel <[email protected]> Bail out of AIPS configuration if OP-TEE has cleared the MTW ("master trusted for write access") bit for the ARM core master to lock down AIPS configuration.
Signed-off-by: Philipp Zabel <[email protected]> Link: https://lore.barebox.org/[email protected] Signed-off-by: Sascha Hauer <[email protected]> (cherry picked from commit 4fbda28fa7ec6d6cc0e480b19cc52c955b5154dd) Signed-off-by: Ahmad Fatoum <[email protected]> --- arch/arm/mach-imx/imx6.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index ed6cde801ec7..0cf2c17d6b90 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -31,8 +31,16 @@ #define MX6_OCOTP_CFG0 0x410 #define MX6_OCOTP_CFG1 0x420 +#define BM_MPR_MPROT1_MTW (0x1 << 25) + static void imx6_configure_aips(void __iomem *aips) { + u32 mpr = readl(aips); + + /* Bail if CPU ist not trusted for write accesses. */ + if (!(mpr & BM_MPR_MPROT1_MTW)) + return; + /* * Set all MPROTx to be non-bufferable, trusted for R/W, * not forced to user-mode. -- 2.47.3
