After setting the cntfrq the global PBL clocksource must be re-initialized to function correctly.
Signed-off-by: Stefan Kerkmann <[email protected]> --- arch/arm/mach-layerscape/lowlevel-ls1028a.c | 6 +++++- arch/arm/mach-layerscape/lowlevel-ls1046a.c | 5 ++++- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-layerscape/lowlevel-ls1028a.c b/arch/arm/mach-layerscape/lowlevel-ls1028a.c index fd013b2b52..ed9284d55a 100644 --- a/arch/arm/mach-layerscape/lowlevel-ls1028a.c +++ b/arch/arm/mach-layerscape/lowlevel-ls1028a.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> #include <io.h> +#include <asm/hardware/arm_architected_timer.h> #include <asm/syscounter.h> #include <asm/system.h> #include <mach/layerscape/errata.h> @@ -35,8 +36,11 @@ static void ls1028a_timer_init(void) void ls1028a_init_lowlevel(void) { + const uint64_t cntfrq = 25000000; + scfg_init(SCFG_ENDIANESS_LITTLE); - set_cntfrq(25000000); + set_cntfrq(cntfrq); + arm_arch_timer_init(cntfrq); ls1028a_timer_init(); ls1028a_errata(); } diff --git a/arch/arm/mach-layerscape/lowlevel-ls1046a.c b/arch/arm/mach-layerscape/lowlevel-ls1046a.c index 1307c05eaf..cc2793acf2 100644 --- a/arch/arm/mach-layerscape/lowlevel-ls1046a.c +++ b/arch/arm/mach-layerscape/lowlevel-ls1046a.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ #include <common.h> #include <io.h> +#include <asm/hardware/arm_architected_timer.h> #include <asm/syscounter.h> #include <asm/system.h> #include <mach/layerscape/errata.h> @@ -222,11 +223,13 @@ void ls1046a_init_lowlevel(void) { struct ccsr_cci400 __iomem *cci = IOMEM(LSCH2_CCI400_ADDR); struct ccsr_scfg *scfg = IOMEM(LSCH2_SCFG_ADDR); + const uint64_t cntfrq = 25000000; scfg_init(SCFG_ENDIANESS_BIG); init_csu(); ls1046a_init_l2_latency(); - set_cntfrq(25000000); + set_cntfrq(cntfrq); + arm_arch_timer_init(cntfrq); syscnt_enable(IOMEM(LSCH2_SYS_COUNTER_ADDR)); /* Make DMA master reads and writes snoopable */ -- 2.47.3
