From: Sascha Hauer <[email protected]> The code tries to mask the bits in SDIV_MASK from 'tmp'. SDIV_MASK already contains the shifted value, so shifting it again is wrong. No functional change though as SDIV_SHIFT is zero.
Signed-off-by: Sascha Hauer <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Abel Vesa <[email protected]> [ahmad: cherry-picked from Linux commit d77461a616b659bd88d] Signed-off-by: Ahmad Fatoum <[email protected]> --- drivers/clk/imx/clk-pll14xx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index c1d5a6b88f41..a4aa9ce548cb 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -191,7 +191,7 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate, tmp = readl(pll->base + DIV_CTL0); if (!clk_pll14xx_mp_change(rate, tmp)) { - tmp &= ~(SDIV_MASK) << SDIV_SHIFT; + tmp &= ~SDIV_MASK; tmp |= rate->sdiv << SDIV_SHIFT; writel(tmp, pll->base + DIV_CTL0); @@ -273,7 +273,7 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate, tmp = readl(pll->base + DIV_CTL0); if (!clk_pll14xx_mp_change(rate, tmp)) { - tmp &= ~(SDIV_MASK) << SDIV_SHIFT; + tmp &= ~SDIV_MASK; tmp |= rate->sdiv << SDIV_SHIFT; writel(tmp, pll->base + DIV_CTL0); -- 2.47.3
