You could bit-bang SPI Master using some GPIO pins, but you can't run
the clock much faster than 1 KHz using a user-space program under
Linux. With a custom driver, you could run faster but it would still be
limited by the interrupt latency caused by other ISRs. You could do it
using a PRU to bit-bang some GPIO pins, and it could run much faster.
(Probably as fast as your SPI slave devices can run.) That kind of
"bit-banging a communications protocol" is why the PRUs are in the chip.
Each of the existing SPI modules have some provision for generating
different SPI_CSN[n] signals, but as I recall you can only select four
devices and maybe not all four SPI_CSN[n] signals are routed to a P8 or
P9 pin? If you need to talk to more SPI slave devices, then you could
add a little bit of external hardware so you can use a few GPIO outputs
to steer your SPI_CSN signal to one of many SPI slave devices. Like a
little 1=>16 mux controlled by 4 GPIOs. Then you could just set the
device address in your application before calling the standard SPI
device API.
On 6/4/2014 7:37 AM, swapnes...@gmail.com wrote:
I am trying to run multiple SPI modules (more than the two available
on the BBB) to try and read data from a bunch of accelerometers
(LSM303D).
I was therefore wondering if it would be possible to implement the SPI
module using code (preferably C/C++) on the abundant GPIO pins. I have
been scanning through a lot of documentation but I cant seem to find
anything that fits the bill.
Please help --- getting desperate...
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