On 19 May 2015 at 22:41, Max <msonnail...@gmail.com> wrote:

> Did you try any change in the EN pin of U4 (enable signal of 3V3B)?
>

No, we replaced U4 by this state-of-the-art voltage-tracking regulator:


​
It can't supply as much current as the original, but our needs are modest
enough.



> I'm about to try SYS_RESETn (PMIC_PGOOD after U16), but I'm concerned
> about the 20ms turn on delay (plus 10ms due to the RC).
> The other option is to go back to use 3V3AUX, and add a 1k load resistor
> to reduce the discharge time.
>

I would advise against both of these choices: Only PORz guarantees that the
AM335x IOs will be high-Z, SYS_RESETn is deasserted considerably later
during power-on. Using it would also case 3v3b to be power-cycled during
warm reset, which may have pros and cons but in any case if I'm reading the
TRM right it is asserted too early in this case and therefore there's a
risk the AM335x ends up driving into unpowered external peripherals.

Any reason why you're not considering PMIC_PGOOD itself? In general I'd
restrict to PMIC signals that transition somewhere between strobe 4 and
PGOOD, which makes PGOOD itself basically the only signal that qualifies.

If you do use LDO2 (3v3aux) for whatever reason, try to avoid having any
signal to the AM335x being driven high from the 3v3b during boot. In
particular, avoid having a console cable connected at boot (at least during
production use) given the stress this would put on the UART0_RXD pin. It
would then also be a good idea to reprogram LDO2 to strobe 7 as soon as
possible during early boot (preferably in the SPL).

A load resistor on 3v3b may be a good idea anyway since it lacks the active
discharging that the PMIC LDOs have.

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