In addition to the other thread, I'd suggest looking at the BeagleLogic code. It's possible to move _large_ amounts of data through the PRU to the DRAM, but it requires some finesse.
A few additional comments in-line, below. On 6/10/2015 11:24 AM, William Hermans wrote: > Here is something for you to look at Bill. > http://comments.gmane.org/gmane.comp.hardware.beagleboard.user/59975 > > Charles, and a couple other people talk some about cycles and how > many cycles reading / writing takes to various addresses. Not sure > this will answer your question thoroughly or not. One user suggests > using PRU0 to write to the PRU shared RAM, while PRU1 takes this > data, and writes it to DDR. Instead of using DMA. > > On Wed, Jun 10, 2015 at 7:55 AM, Bill M <[email protected]> > wrote: > >> Greetings Charles, >> >> Does the PRU stall when writing to memory outside of the PRU >> address space? It depends. Writes are posted, so they won't stall for long if you aren't saturating the internal SoC bus. >> I am working on interfacing a cheap camera to the PRU and want >> to have it write to a 640 x 480 buffer. So the PRU will only ever >> write to the buffer, and the ARM core will only ever read the >> buffer, so I don't see contention being an issue, but the amount >> of space I will need is bigger than what all the PRU memory >> combined offers so I definitely need to use DDR. My concern is >> that the PRU won't be able to write the data from the camera out >> fast enough, as there will be 8 parallel bits coming in every >> cycle at 12Mhz. I can shift 4 bytes in at a time and write it out >> DWORD at a time (which I guess would make the best use of the >> bus), but that is still a 3Mhz pace. Should the OCP bus be able >> to handle this? It's possible to move a *LOT* more data than that (again, see the BeagleLogic code). Note that you will generally get better results with burst transfers (ie: moving many 32-bit words at a time) than by writing individual DWORDS. Since there are two PRUs, for maximum throughput it makes sense to have one PRU doing the data acquisition and the other PRU writing the data to system memory. You can communicate up to the entire PRU register set "broadside" between the two PRU cores in one clock using the exchange instructions. -- Charles Steinkuehler [email protected] -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
