The expensive part is often having to save and restore all the state in registers and other bits on context switch.
On Tue, Jan 5, 2016 at 4:01 PM, Steinar H. Gunderson <[email protected] > wrote: > On Tue, Jan 05, 2016 at 03:36:10PM -0600, Benjamin Cronce wrote: > > You can't have different virtual memory space and not take some large > > switching overhead without devoting a lot of transistors to massive > caches. > > And the larger the caches, the higher the latency. > > I'm sure you already know this, but just to add to what you're saying: > Modern CPUs actually have cache-line tagging tricks so that they don't have > to blow the entire L1 just because you do a context switch. It would be too > expensive. > > /* Steinar */ > -- > Homepage: https://www.sesse.net/ > _______________________________________________ > Bloat mailing list > [email protected] > https://lists.bufferbloat.net/listinfo/bloat >
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