On 2018-11-27, 10:31, "Stephen Hemminger" <[email protected]> wrote:
    With asynchronous circuits there is too much unpredictablity and 
instability.
    Seem to remember there are even cases where two inputs arrive at once and 
output is non-determistic.
    
IIRC they talked about that some too. I think maybe some papers were going back 
and forth. But last I heard, they proved that this is not a real objection, in 
that:
1. you can quantify the probability of failure and ensure a design keeps it 
under threshold when operating within specified conditions (e.g. normal 
temperature and voltage thresholds)
2. you can work around the issues where it's critical by adding failure 
detection and faults, and
3. you have the exact same fundamental theoretical problem with synchronous 
circuits, particularly in registers that can keep a value through a clock 
cycle, but it hasn't stopped them from being useful.

I'm not an expert and this was all a long time ago for me, but  the qdi wiki 
page doesn't disagree with what I'm remembering here, and has some good 
references on the topic:
https://en.wikipedia.org/wiki/Quasi-delay-insensitive_circuit#Stability_and_non-interference
https://en.wikipedia.org/wiki/Quasi-delay-insensitive_circuit#Timing


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