This was overlooked in i386 when apic support was added.
Correct the i386 version and add x86_64 support correctly.
---
i386/i386at/boothdr.S | 2 ++
x86_64/boothdr.S | 13 +++++++++++++
2 files changed, 15 insertions(+)
diff --git a/i386/i386at/boothdr.S b/i386/i386at/boothdr.S
index ff055746..b19843ad 100644
--- a/i386/i386at/boothdr.S
+++ b/i386/i386at/boothdr.S
@@ -79,6 +79,7 @@ boot_entry:
movl $solid_intstack+INTSTACK_SIZE-4, %esp
andl $0xfffffff0,%esp
+#ifdef APIC
/* Enable local apic in xAPIC mode */
xorl %eax, %eax
xorl %edx, %edx
@@ -89,6 +90,7 @@ boot_entry:
andl $(~APIC_MSR_X2APIC), %eax
movl $APIC_MSR, %ecx
wrmsr
+#endif
/* Reset EFLAGS to a known state. */
pushl $0
diff --git a/x86_64/boothdr.S b/x86_64/boothdr.S
index fb701604..020aff93 100644
--- a/x86_64/boothdr.S
+++ b/x86_64/boothdr.S
@@ -21,6 +21,7 @@
#include <i386/i386asm.h>
#include <i386/i386/proc_reg.h>
#include <i386/i386/seg.h>
+#include <i386/apic.h>
#define BOOT_CS 0x8
#define BOOT_DS 0x10
@@ -52,6 +53,18 @@ boot_hdr:
.global _start
_start:
boot_entry:
+#ifdef APIC
+ /* Enable local apic in xAPIC mode */
+ xorl %eax, %eax
+ xorl %edx, %edx
+ movl $APIC_MSR, %ecx
+ rdmsr
+ orl $APIC_MSR_ENABLE, %eax
+ orl $APIC_MSR_BSP, %eax
+ andl $(~APIC_MSR_X2APIC), %eax
+ movl $APIC_MSR, %ecx
+ wrmsr
+#endif
/*
* Prepare minimal page mapping to jump to 64 bit and to C code.
* The first 4GB is identity mapped, and the first 2GB are re-mapped
--
2.51.0
