[PATCH v3 4/4 gnumach] x86_64: Add GS segment configuration to early gdt

[Damien Zammit]

---
 i386/i386/msr.h  |  3 +++
 x86_64/boothdr.S | 55 +++++++++++++++++++++++++++++++++++++++++++++---
 2 files changed, 55 insertions(+), 3 deletions(-)

diff --git a/i386/i386/msr.h b/i386/i386/msr.h
index eefdf685..87898b9e 100644
--- a/i386/i386/msr.h
+++ b/i386/i386/msr.h
@@ -27,6 +27,9 @@
 #define MSR_REG_FMASK 0xC0000084
 #define MSR_REG_FSBASE 0xC0000100
 #define MSR_REG_GSBASE 0xC0000101
+#ifdef __x86_64__
+#define MSR_REG_KGSBASE 0xC0000102
+#endif
 
 #define MSR_EFER_SCE  0x00000001
 
diff --git a/x86_64/boothdr.S b/x86_64/boothdr.S
index 14de9c07..0c5a96ff 100644
--- a/x86_64/boothdr.S
+++ b/x86_64/boothdr.S
@@ -20,6 +20,7 @@
 
 #include <i386/i386asm.h>
 #include <i386/i386/proc_reg.h>
+#include <i386/i386/gdt.h>
 #include <i386/i386/msr.h>
 #include <i386/i386/seg.h>
 #include <i386/apic.h>
@@ -175,12 +176,29 @@ boot_entry64:
        movw    %ax,%ds
        movw    %ax,%es
        movw    %ax,%ss
+       movw    $PERCPU_DS,%ax
+       movw    %ax,%gs
 
        /* Switch to our own interrupt stack.  */
        movq    $solid_intstack+INTSTACK_SIZE-16, %rax
        andq    $(~15),%rax
        movq    %rax,%rsp
 
+#if NCPUS > 1
+       /* Set GS base address */
+       movq    $percpu_array, %rdx
+       movl    %edx, %eax
+       shrq    $32, %rdx
+       movl    $MSR_REG_GSBASE, %ecx
+       wrmsr
+
+       /* Set KernelGS base address to 0 */
+       xorl    %eax, %eax
+       xorl    %edx, %edx
+       movl    $MSR_REG_KGSBASE, %ecx
+       wrmsr
+#endif
+
        /* Reset EFLAGS to a known state.  */
        pushq   $0
        popf
@@ -215,16 +233,47 @@ iplt_done:
        .section .boot.data
        .align 4096
 #define  SEG_ACCESS_OFS 40
-#define  SEG_GRANULARITY_OFS 52
+#define  SEG_FLAGS_OFS 52
 gdt64:
        /* NULL segment = 0x0 */
        .quad   0
 
        /* BOOT_CS = 0x8 */
-        .quad  (ACC_P << SEG_ACCESS_OFS) | (ACC_CODE_R << SEG_ACCESS_OFS) | 
(SZ_64 << SEG_GRANULARITY_OFS)
+        .quad  ((ACC_P | ACC_CODE_R) << SEG_ACCESS_OFS) | (SZ_64 << 
SEG_FLAGS_OFS)
 
        /* BOOT_DS = 0x10 */
-        .quad  (ACC_P << SEG_ACCESS_OFS) | (ACC_DATA_W << SEG_ACCESS_OFS)
+        .quad  ((ACC_P | ACC_DATA_W) << SEG_ACCESS_OFS) | (SZ_64 << 
SEG_FLAGS_OFS)
+
+       /* LDT = 0x18 */
+       .quad   0
+
+       /* TSS = 0x20 */
+       .quad   0
+
+       /* USER_LDT = 0x28 */
+       .quad   0
+
+       /* USER_TSS = 0x30 */
+       .quad   0
+
+       /* LINEAR = 0x38 */
+       .quad   0
+
+       /* FPREGS = 0x40 */
+       .quad   0
+
+       /* USER_GDT = 0x48 and 0x50 */
+       .quad   0
+       .quad   0
+
+       /* USER_TSS64 = 0x58 */
+       .quad   0
+
+       /* USER_TSS64 = 0x60 */
+       .quad   0
+
+       /* boot GS = 0x68 */
+        .quad  ((ACC_P | ACC_DATA_W) << SEG_ACCESS_OFS) | (SZ_64 << 
SEG_FLAGS_OFS)
 gdt64end:
        .skip   (4096 - (gdt64end - gdt64))
 gdt64pointer:
-- 
2.51.0