On Thu, Oct 20, 2016 at 04:53:32PM +0300, Paul Irofti wrote:
> cn30xxgmx0 at iobus0 base 0x1180008000000
> port are disable
> cn30xxgmx1 at iobus0 base 0x1180010000000
> panic: : don't know phy address for port 16
The first GMX interface is disabled in the chip config. So far, so good,
I think. The second interface is apparently enabled, but the lookup of
the first port's PHY address failed because there is no hard-coded entry
for the board.
The board's firmware might provide fdt data. Does the following
diff help?
Index: arch/octeon/dev/cn30xxgmx.c
===================================================================
RCS file: src/sys/arch/octeon/dev/cn30xxgmx.c,v
retrieving revision 1.26
diff -u -p -r1.26 cn30xxgmx.c
--- arch/octeon/dev/cn30xxgmx.c 4 Aug 2016 13:10:31 -0000 1.26
+++ arch/octeon/dev/cn30xxgmx.c 20 Oct 2016 15:35:49 -0000
@@ -33,6 +33,8 @@
#include <sys/malloc.h>
#include <sys/syslog.h>
+#include <dev/ofw/openfirm.h>
+
#include <machine/bus.h>
#include <machine/octeon_model.h>
#include <machine/octeonvar.h>
@@ -181,6 +183,22 @@ cn30xxgmx_port_phy_addr(int port)
/* portwell cam-0100 */
0x02, 0x03, 0x22
};
+ char name[64];
+ int phynode = 0;
+ int portnode = -1;
+ uint32_t phy = 0;
+
+ snprintf(name, sizeof(name),
+ "/soc/pip@11800a0000000/interface@%x/ethernet@%x",
+ port / 16, port % 16);
+ portnode = OF_finddevice(name);
+ if (portnode != -1) {
+ phy = OF_getpropint(portnode, "phy-handle", 0);
+ if (phy != 0)
+ phynode = OF_getnodebyphandle(phy);
+ if (phynode != 0)
+ return OF_getpropint(phynode, "reg", 0);
+ }
switch (octeon_boot_info->board_type) {
case BOARD_TYPE_UBIQUITI_E100: /* port 0: 7, port 1: 6 */
