On Fri, Oct 21, 2016 at 10:56:34AM +0300, Paul Irofti wrote:
> On Thu, Oct 20, 2016 at 03:51:50PM +0000, Visa Hankala wrote:
> > On Thu, Oct 20, 2016 at 04:53:32PM +0300, Paul Irofti wrote:
> > > cn30xxgmx0 at iobus0 base 0x1180008000000
> > > port are disable
> > > cn30xxgmx1 at iobus0 base 0x1180010000000
> > > panic: : don't know phy address for port 16
> >
> > The first GMX interface is disabled in the chip config. So far, so good,
> > I think. The second interface is apparently enabled, but the lookup of
> > the first port's PHY address failed because there is no hard-coded entry
> > for the board.
> >
> > The board's firmware might provide fdt data. Does the following
> > diff help?
>
> Not really. I also just committed a diff that fixes the build. Were
> you able to build before?
Yes, from a clean tree. Did you notice that you hard-wired the PCI code
to PCI Express mode? If you don't care, why did you "fix" it, then?
> cn30xxgmx1 at iobus0 base 0x1180010000000
> cnmac0 at cn30xxgmx1: SGMII, address 00:90:0b:31:d8:5f
> cnmac1 at cn30xxgmx1: SGMII, address 00:90:0b:31:d8:60
> panic: : don't know phy address for port 18
Ah, there are only two ports in use. I guess one of them is the
management port and the other is connected to the built-in switch.
Maybe the attach routine should just skip ports that lack a PHY mapping,
for now.
Index: arch/octeon/dev/cn30xxgmx.c
===================================================================
RCS file: src/sys/arch/octeon/dev/cn30xxgmx.c,v
retrieving revision 1.26
diff -u -p -r1.26 cn30xxgmx.c
--- arch/octeon/dev/cn30xxgmx.c 4 Aug 2016 13:10:31 -0000 1.26
+++ arch/octeon/dev/cn30xxgmx.c 21 Oct 2016 11:45:01 -0000
@@ -33,6 +33,8 @@
#include <sys/malloc.h>
#include <sys/syslog.h>
+#include <dev/ofw/openfirm.h>
+
#include <machine/bus.h>
#include <machine/octeon_model.h>
#include <machine/octeonvar.h>
@@ -181,6 +183,22 @@ cn30xxgmx_port_phy_addr(int port)
/* portwell cam-0100 */
0x02, 0x03, 0x22
};
+ char name[64];
+ int phynode = 0;
+ int portnode = -1;
+ uint32_t phy = 0;
+
+ snprintf(name, sizeof(name),
+ "/soc/pip@11800a0000000/interface@%x/ethernet@%x",
+ port / 16, port % 16);
+ portnode = OF_finddevice(name);
+ if (portnode != -1) {
+ phy = OF_getpropint(portnode, "phy-handle", 0);
+ if (phy != 0)
+ phynode = OF_getnodebyphandle(phy);
+ if (phynode != 0)
+ return OF_getpropint(phynode, "reg", 0);
+ }
switch (octeon_boot_info->board_type) {
case BOARD_TYPE_UBIQUITI_E100: /* port 0: 7, port 1: 6 */
@@ -196,10 +214,14 @@ cn30xxgmx_port_phy_addr(int port)
return port - 16; /* GMX1: eth[0-3] */
return -1;
- default:
+ case BOARD_TYPE_CN3010_EVB_HS5:
+ /* CAM-0100 */
if (port >= nitems(octeon_eth_phy_table))
return -1;
return octeon_eth_phy_table[port];
+
+ default:
+ return -1;
}
}
@@ -209,8 +231,9 @@ cn30xxgmx_attach(struct device *parent,
struct cn30xxgmx_softc *sc = (void *)self;
struct iobus_attach_args *aa = aux;
struct cn30xxgmx_attach_args gmx_aa;
- int status;
int i;
+ int phy_addr;
+ int status;
struct cn30xxgmx_port_softc *port_sc;
printf("\n");
@@ -229,6 +252,11 @@ cn30xxgmx_attach(struct device *parent,
M_DEVBUF, M_NOWAIT | M_ZERO);
for (i = 0; i < sc->sc_nports; i++) {
+ phy_addr = cn30xxgmx_port_phy_addr(
+ GMX_PORT_NUM(sc->sc_unitno, i));
+ if (phy_addr == -1)
+ continue;
+
port_sc = &sc->sc_ports[i];
port_sc->sc_port_gmx = sc;
port_sc->sc_port_no = GMX_PORT_NUM(sc->sc_unitno, i);
@@ -271,11 +299,7 @@ cn30xxgmx_attach(struct device *parent,
gmx_aa.ga_port_type = sc->sc_port_types[i];
gmx_aa.ga_gmx = sc;
gmx_aa.ga_gmx_port = port_sc;
- gmx_aa.ga_phy_addr = cn30xxgmx_port_phy_addr(
- port_sc->sc_port_no);
- if (gmx_aa.ga_phy_addr == -1)
- panic(": don't know phy address for port %d",
- port_sc->sc_port_no);
+ gmx_aa.ga_phy_addr = phy_addr;
config_found_sm(self, &gmx_aa,
cn30xxgmx_print, cn30xxgmx_submatch);
Index: arch/octeon/include/octeonvar.h
===================================================================
RCS file: src/sys/arch/octeon/include/octeonvar.h,v
retrieving revision 1.31
diff -u -p -r1.31 octeonvar.h
--- arch/octeon/include/octeonvar.h 16 Jul 2016 10:19:55 -0000 1.31
+++ arch/octeon/include/octeonvar.h 21 Oct 2016 11:45:01 -0000
@@ -178,6 +178,7 @@ struct octeon_fau_map {
* NB: BOARD_TYPE_UBIQUITI_E100 is also used by other vendors, but we don't run
* on those boards yet.
*/
+#define BOARD_TYPE_CN3010_EVB_HS5 11
#define BOARD_TYPE_UBIQUITI_E100 20002
#define BOARD_TYPE_UBIQUITI_E200 20003
#define BOARD_TYPE_DSR_500 20015
