On Fri, Dec 11, 2020 at 03:14:52PM -0500, Johan Huldtgren wrote:
> init: single user shell terminated, restarting
> init: single user shell terminated, restarting
The problem is that libc setjmp tries to save the MXCSR register.
> cpu0: Geode(TM) Integrated Processor by AMD PCS ("AuthenticAMD" 586-class)
> 500 MHz, 05-0a-02
> cpu0: FPU,DE,PSE,TSC,MSR,CX8,SEP,PGE,CMOV,CFLUSH,MMX,MMXX,3DNOW2,3DNOW
This processor has no SSE support, so accessing MXCSR fails.
I tried several variants to detect SSE support during runtime in
libc. None of them was working in a nice way. So I suggest to
remove the MXCSR bits. For regress/lib/libc/setjmp-fpu it is enough
to save the FPU CW register.
i386 compiler does not use SSE by default. There is some code in
libm/arch/i387/fenv.c that may access MXCSR. Can we assume that
programs working with MXCSR will care about the state itself or not
use setjmp?
ok?
bluhm
Index: lib/libc/arch/i386/gen/_setjmp.S
===================================================================
RCS file: /mount/openbsd/cvs/src/lib/libc/arch/i386/gen/_setjmp.S,v
retrieving revision 1.8
diff -u -p -r1.8 _setjmp.S
--- lib/libc/arch/i386/gen/_setjmp.S 6 Dec 2020 18:13:15 -0000 1.8
+++ lib/libc/arch/i386/gen/_setjmp.S 12 Dec 2020 22:03:57 -0000
@@ -63,7 +63,6 @@ ENTRY(_setjmp)
movl %ecx,(_JB_EBP * 4)(%eax)
movl %esi,(_JB_ESI * 4)(%eax)
movl %edi,(_JB_EDI * 4)(%eax)
- stmxcsr (_JB_MXCSR * 4)(%eax)
fnstcw (_JB_FCW * 4)(%eax)
xorl %eax,%eax
ret
@@ -75,7 +74,6 @@ ENTRY(_longjmp)
addl $__jmpxor-1b,%ecx # load cookie address
movl 4(%esp),%edx # parameter, pointer to env
movl 8(%esp),%eax # parameter, val
- ldmxcsr (_JB_MXCSR * 4)(%edx)
fldcw (_JB_FCW * 4)(%edx)
movl (_JB_EBX * 4)(%edx),%ebx
movl (_JB_ESP * 4)(%edx),%esi
Index: lib/libc/arch/i386/gen/setjmp.S
===================================================================
RCS file: /mount/openbsd/cvs/src/lib/libc/arch/i386/gen/setjmp.S,v
retrieving revision 1.13
diff -u -p -r1.13 setjmp.S
--- lib/libc/arch/i386/gen/setjmp.S 6 Dec 2020 18:13:15 -0000 1.13
+++ lib/libc/arch/i386/gen/setjmp.S 12 Dec 2020 22:04:01 -0000
@@ -78,7 +78,6 @@ ENTRY(setjmp)
movl 8(%edx),%edx # load eip cookie over cookie address
xorl 0(%esp),%edx # caller address
movl %edx,(_JB_EIP * 4)(%ecx)
- stmxcsr (_JB_MXCSR * 4)(%ecx)
fnstcw (_JB_FCW * 4)(%ecx)
xorl %eax,%eax
ret
@@ -97,7 +96,6 @@ ENTRY(longjmp)
movl 4(%esp),%edx # parameter, pointer to env
movl 8(%esp),%eax # parameter, val
- ldmxcsr (_JB_MXCSR * 4)(%edx)
fldcw (_JB_FCW * 4)(%edx)
movl (_JB_EBX * 4)(%edx),%ebx
movl (_JB_ESP * 4)(%edx),%esi
Index: lib/libc/arch/i386/gen/sigsetjmp.S
===================================================================
RCS file: /mount/openbsd/cvs/src/lib/libc/arch/i386/gen/sigsetjmp.S,v
retrieving revision 1.12
diff -u -p -r1.12 sigsetjmp.S
--- lib/libc/arch/i386/gen/sigsetjmp.S 6 Dec 2020 18:13:15 -0000 1.12
+++ lib/libc/arch/i386/gen/sigsetjmp.S 12 Dec 2020 22:04:05 -0000
@@ -67,7 +67,6 @@ ENTRY(sigsetjmp)
movl 4(%edx),%edx # load eip cookie over cookie address
xorl 0(%esp),%edx
movl %edx,(_JB_EIP * 4)(%ecx)
- stmxcsr (_JB_MXCSR * 4)(%ecx)
fnstcw (_JB_FCW * 4)(%ecx)
xorl %eax,%eax
ret
@@ -91,7 +90,6 @@ ENTRY(siglongjmp)
movl 4(%esp),%edx # reload in case sigprocmask failed
movl 8(%esp),%eax # parameter, val
- ldmxcsr (_JB_MXCSR * 4)(%edx)
fldcw (_JB_FCW * 4)(%edx)
movl (_JB_EBX * 4)(%edx),%ebx
movl (_JB_ESP * 4)(%edx),%esi
Index: sys/arch/i386/include/setjmp.h
===================================================================
RCS file: /mount/openbsd/cvs/src/sys/arch/i386/include/setjmp.h,v
retrieving revision 1.3
diff -u -p -r1.3 setjmp.h
--- sys/arch/i386/include/setjmp.h 6 Dec 2020 15:31:30 -0000 1.3
+++ sys/arch/i386/include/setjmp.h 12 Dec 2020 22:04:32 -0000
@@ -13,7 +13,6 @@
#define _JB_EDI 5
#define _JB_SIGMASK 6
#define _JB_SIGFLAG 7
-#define _JB_MXCSR 8
-#define _JB_FCW 9
+#define _JB_FCW 8
#define _JBLEN 10 /* size, in longs, of a jmp_buf */
